SLVSF02D March 2019 – May 2020 TPS23881
COMMAND = 26h with 1 Data Byte, Read/Write
|Physical Channel # of Logical Channel 4||Physical Channel # of Logical Channel 3||Physical Channel # of Logical Channel 2||Physical Channel # of Logical Channel 1|
|LEGEND: R/W = Read/Write; R = Read only; W = Write only; CR = Clear on Read; -n = value after reset|
|Bit||Field||Type||POR / RST||Description|
|7–0||Physical Channel # of Logical Channel n||R/W||1110 0100b / P||Used to re-map channels logically due to physical board constraints. Re-mapping is between any channel within 4-channel group (1-4 or 5-8). All channels of a group of four must be in OFF mode prior to receiving the port re-mapping command, otherwise the command will be ignored. By default there is no re-mapping.
Each pair of bits corresponds to the logical port assigned.
The selection per port is as follows:
|Re-Map Code||Physical Channel||Package Pins|
|When there is no re-mapping the default value of this register is 1110,0100. The 2 MSbits with a value 11 indicate that logical channel 4 is mapped onto physical channel #4, the next 2 bits, 10, suggest logical channel 3 is mapped onto physical channel #3 and so on.
Note: Code duplication is not allowed – that is, the same code cannot be written into the remapping bits of more than one port – if such a value is received, it will be ignored and the chip will stay with existing configuration.
Note: Port remapping configuration is kept unchanged if 0x1A IC reset command is received.
The RST condition of "P" indicates that the previous state of these bits will be preserved following a device reset using the RESET pin. Thus, pulling the RESET input low will not overwrite any user changes to this register.
Only logical Channels 3 and 4 and 1 and 2 may be wired as 4-pair Ports. Unpredictable behavior will occur if any other combinations of logical Channels are wired in a 4-pair configuration.
After port remapping, TI recommends to do at least one detection-classification cycle before turn on.