SLVSF02D March 2019 – May 2020 TPS23881
COMMAND = 24h with 1 Data Byte, Read Only
COMMAND = 25h with 1 Data Byte, Clear on Read
|LEGEND: R/W = Read/Write; R = Read only; W = Write only; CR = Clear on Read; -n = value after reset|
|7–0||PF4–PF1||R or CR||0||Represents the fault status of the classification and detection for channel n, following a failed turn on attempt with the PWONn command. These bits are cleared when channel n is turned off.
PFn: the selection is as follows:
|Fault Code||Power-on Fault Description|
When a Start Fault occurs and the PECn bit is not set, then this register will indicate the cause of the fault.
An insufficient power fault is reported anytime the reg 0x29 configuration will not allow a channel to be powered. See the section describing Power Allocation and Power Demotion.
For 4-pair wired Ports:
Thee bits will be updated individually for dual signature connected devices
Thee bits will be updated concurrently for single signature connected devices