SLVSF02D March 2019 – May 2020 TPS23881
COMMAND = 10h with 1 Data Byte, Read only
Each bit represents the actual power status of a channel.
Each bit xx1-4 represents an individual channel.
These bits are cleared when channel-n is turned off, including if the turn off is caused by a fault condition.
|LEGEND: R/W = Read/Write; R = Read only; -n = value after reset|
|7–4||PG4–PG1||R||0||Each bit, when at 1, indicates that the channel is on and that the voltage at DRAINn pin has gone below the power good threshold during turn on.
These bits are latched high once the turn on is complete and can only be cleared when the channel is turned off or at RESET/POR.
1 = Power is good
0 = Power is not good
|3–0||PE4–PE1||R||0||Each bit indicates the ON/OFF state of the corresponding channel.
1 = Channel is on
0 = Channel is off
For 4-pair wired ports, these bits will be updated individually as the status changes for each channel
For 4-Pair Single Signature devices, the PGn bits will be set only after the status has changed on both channels. This is done to prevent the possible scenario of dual interrupts as the second channel completes processing after the first.
For 4-Pair Dual Signature devices, the PECn and PGCn bits will be set as the status changes on each channel.