The separate VDD pin provides flexibility for operational power and controlled rail voltage. While the internal UVLO has been set to 2.5 V, the device requires at least 3 V to generate the specified GATE drive voltage. Sufficient BYP voltage to run internal circuits occurs at VDD voltages between 2.5 V and 3 V. There are three choices for power, A, C, or a separate supply, two of which are demonstrated in Figure 12. One choice for voltage rails over 3.3 V is to power from C, since it is typically the source of reliable power. Voltage rails below 3.3 V, that is, 2.5 V and below, should use a separate supply such as 5 V. A separate VDD supply can be used to control voltages above it, for example 5 V powering VDD to control a 12-V bus.
VDD is the main source of power for the internal control circuits. The charge pump that powers BYP draws most of its power from VDD. The input should be low impedance, making a bypass capacitor a preferred solution.
A 10-Ω series resistor may be used to limit inrush current into the bypass capacitor, and to provide noise filtering for the supply.
BYP is the interconnection point between a charge pump, V(AC) monitor amplifiers and comparators, and the gate driver. C(BYP) must be used to filter the charge pump. A 2200 pF is recommended, but the value is not critical.