SLVSDJ0E May   2016  – January 2021 TPS25940-Q1

PRODMIX  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parametric Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable and Adjusting Undervoltage Lockout
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and In-Rush Current Control
      4. 9.3.4 Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
        3. 9.3.4.3 Start-Up with Short on Output
        4. 9.3.4.4 Constant Current Limit Behavior During Overcurrent Faults
      5. 9.3.5 FAULT Response
      6. 9.3.6 Current Monitoring
      7. 9.3.7 Power Good Comparator
      8. 9.3.8 IN, OUT and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 DevSleep Mode
      2. 9.4.2 Shutdown Control
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step by Step Design Procedure
        2. 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.5.1 Case1: Start-Up Without Load: Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.5.2 Case 2: Start-Up With Load: Output Capacitance C(OUT) and Load Draws Current During Start-Up
        6. 10.2.2.6 Programing the Power Good Set Point
        7. 10.2.2.7 Support Component Selections—R6, R7 and CIN
      3. 10.2.3 Application Curves
      4. 10.2.4 System Examples
        1. 10.2.4.1 VBUS Short-to-Battery, Short-to-Ground Protection of USB Port in Automotive Systems
        2. 10.2.4.2 Power Failure Protection for Holdup Power
        3. 10.2.4.3 Overload Detection Using TPS25940xx-Q1
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

–40°C ≤ TJ = TA ≤ 125°C, 2.7 V ≤ V(IN) = 18 V, V(EN/UVLO) = 2 V, V(OVP) = V(DEVSLP) = V(PGTH) = 0 V, R(ILIM) = 150 kΩ, C(OUT) = 1 µF, C(dVdT) = OPEN, PGOOD = FLT = IMON = OPEN. Positive current into terminals. All voltages referenced to GND (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT
V(IN)Operating input voltage2.718V
V(UVR)Internal UVLO threshold, rising2.22.32.4V
V(UVRhys)Internal UVLO hysteresis105116125mV
IQ(ON)Supply current, enabledV(EN/UVLO) = 2 V, V(IN) = 3 V140210300µA
V(EN/UVLO) = 2 V, V(IN) = 12 V140199260
V(EN/UVLO) = 2 V, V(IN) = 18 V140202270
IQ(OFF)Supply current, disabledV(EN/UVLO) = 0 V, V(IN) = 3 V48.615µA
V(EN/UVLO) = 0 V, V(IN) = 12 V61520
V(EN/UVLO) = 0 V, V(IN) = 18 V818.525
IQ(DEVSLP)Supply current, devSleep modeV(DEVSLP) = 0 V, V(IN) = 2.7 V to 18 V7095130µA
ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT
V(ENR)EN/UVLO threshold voltage, rising0.970.991.01V
V(ENF)EN/UVLO threshold voltage, falling0.90.920.94V
V(SHUTF)EN threshold voltage for Low IQ shutdown, falling0.30.470.63V
V(SHUTFhys)EN hysteresis for low IQ shutdown, hysteresis(1)66mV
IENEN Input leakage current0 V ≤ V(EN/UVLO) ≤ 18 V–1000100nA
OVER VOLTAGE PROTECTION (OVP) INPUT
V(OVPR)Overvoltage threshold voltage, rising0.970.991.01V
V(OVPF)Overvoltage threshold voltage, falling0.90.920.94V
I(OVP)OVP input leakage current0 V ≤ V(OVP) ≤ 5 V–1000100nA
DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH
V(DEVSLPR)DEVSLP threshold voltage, rising1.61.852V
V(DEVSLPF)DEVSLP threshold voltage, falling0.80.961.1V
I(DEVSLP)DEVSLP input leakage current0.2 V ≤ V(DEVSLP) ≤ 18 V0.611.25µA
OUTPUT RAMP CONTROL (dVdT)
I(dVdT)dVdT charging currentV(dVdT) = 0 V0.8511.15µA
R(dVdT)dVdT discharging resistanceEN/UVLO = 0 V, I(dVdT) = 10 mA sinking1624Ω
V(dVdTmax)dVdT maximum capacitor voltage2.62.883.1V
GAIN(dVdT)dVdT to OUT gainΔV(OUT)/ΔV(dVdT)11.6511.912.05V/V
CURRENT LIMIT PROGRAMMING (ILIM)
V(ILIM)ILIM bias voltage0.87V
I(LIM)Current limit(2)R(ILIM) = 150 kΩ, (V(IN) – V(OUT))  = 1 V, Only for TPS25940-Q1/TPS25940L-Q10.530.580.63A
R(ILIM) = 88.7 kΩ, (V(IN) – V(OUT))  = 1 V0.90.991.07
R(ILIM) = 42.2 kΩ, (V(IN) – V(OUT)) = 1 V1.922.082.25
R(ILIM) = 20 kΩ, (V(IN) – V(OUT)) = 1 V4.094.454.81
R(ILIM) = 16.9 kΩ, (V(IN) – V(OUT))  = 1 V4.785.25.62
R(ILIM) = OPEN, Open resistor current limit (single point failure test: UL60950)0.350.450.55
R(ILIM) = SHORT, Shorted resistor current limit (single point failure test: UL60950)0.550.670.8
I(DEVSLP(LIM))DevSleep mode current limit0.550.670.8A
IOSShort-circuit current limit (2)R(ILIM) = 42.2 kΩ, V(VIN) = 12 V, (V(IN) – V(OUT)) = 5 V1.912.072.24A
R(ILIM) = 20 kΩ, V(VIN) = 12 V, (V(IN) – V(OUT)) = 5 V44.44.7
R(ILIM) = 16.9 kΩ, V(VIN) = 12 V, (V(IN) – V(OUT)) = 5 V4.75.115.52
I(FASTRIP)Fast-trip comparator threshold(1)(2)1.5 x I(LIM) + 0.375A
CURRENT MONITOR OUTPUT (IMON)
GAIN(IMON)Gain factor I(IMON):I(OUT)1 A ≤ I(OUT) ≤ 5 A52.3µA/A
1 A ≤ I(OUT) ≤ 5 A, Only for TPS25940-Q1/TPS25940L-Q147.7852.357.23µA/A
MOSFET – POWER SWITCH
RONIN to OUT - ON resistance1 A ≤ I(OUT) ≤ 5 A, TJ = 25°C344249
1 A ≤ I(OUT) ≤ 5 A, –40°C ≤ TJ ≤ +85°C264258
1 A ≤ I(OUT) ≤ 5 A, –40°C ≤ TJ ≤ +125°C264264
1 A ≤ I(OUT) ≤ 5 A, –40°C ≤ TJ ≤ +125°C, Only for TPS259401A-Q1

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PASS FET OUTPUT (OUT)
Ilkg(OUT)OUT leakage current in off stateV(IN) = 18 V, V(EN/UVLO) = 0 V, V(OUT) = 0 V (sourcing)–202µA
V(IN) = 2.7 V, V(EN/UVLO) = 0 V, V(OUT) = 18 V (sinking)61320
V(REVTH)V(IN) – V(OUT) threshold for reverse protection comparator, falling–77–66–55mV
V(FWDTH)V(IN) – V(OUT) threshold for reverse protection comparator, rising86100114mV
FAULT FLAG ( FLT): ACTIVE LOW
R( FLT)FLT internal pull-down resistanceV(OVP) = 2 V, I(FLT) = 5 mA sinking101830Ω
I( FLT)FLT input leakage current0 V ≤ V(FLT) ≤ 18 V–101µA
POSITIVE INPUT for POWER-GOOD COMPARATOR (PGTH)
V(PGTHR)PGTH threshold voltage, rising0.970.991.01V
V(PGTHF)PGTH threshold voltage, falling0.90.920.94V
I(PGTH)PGTH input leakage current0 V ≤ V(PGTH) ≤ 18 V–1000100nA
POWER-GOOD COMPARATOR OUTPUT (PGOOD): ACTIVE HIGH
R(PGOOD)PGOOD internal pull-down resistanceV(PGTH) = 0V, I(PGOOD) = 5 mA sinking102035Ω
I(PGOOD)PGOOD input leakage current0 V ≤ V(PGOOD) ≤ 18 V–101µA
THERMAL SHUT DOWN (TSD)
T(TSD)TSD threshold(1)160°C
T(TSDhys)TSD hysteresis(1)12°C
Thermal fault responseTPS25940-Q1, TPS259401A-Q1Auto-retry
TPS25940L-Q1Latch-off
These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
Pulse-testing techniques maintain junction temperature close to ambient temperature. Thermal effects must be taken into account separately.