SLVSFC9B October   2020  – March 2022 TPS25947

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
      1.      15
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Reverse Polarity Protection
      2. 8.3.2  Undervoltage Lockout (UVLO and UVP)
      3. 8.3.3  Overvoltage Lockout (OVLO)
      4. 8.3.4  Overvoltage Clamp (OVC)
      5. 8.3.5  Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.5.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.5.2 Circuit-Breaker
        3. 8.3.5.3 Active Current Limiting
        4. 8.3.5.4 Short-Circuit Protection
      6. 8.3.6  Analog Load Current Monitor
      7. 8.3.7  Reverse Current Protection
      8. 8.3.8  Overtemperature Protection (OTP)
      9. 8.3.9  Fault Response and Indication (FLT)
      10. 8.3.10 Auxiliary Channel Control (AUXOFF)
      11. 8.3.11 Power Good Indication (PG)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Device Selection
        2. 9.3.2.2 Setting Undervoltage and Overvoltage Thresholds
        3. 9.3.2.3 Setting Output Voltage Rise Time (tR)
        4. 9.3.2.4 Setting Power Good Assertion Threshold
        5. 9.3.2.5 Setting Overcurrent Threshold (ILIM)
        6. 9.3.2.6 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.3.3 Application Curves
    4. 9.4 Active ORing
    5. 9.5 Priority Power MUXing
    6. 9.6 USB PD Port Protection
    7. 9.7 Parallel Operation
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20210329-CA0I-Z85S-7NKQ-W2RGD5NDNPWJ-low.gif Figure 6-1 TPS25947xx RPW Package 10-Pin QFN Top View
Table 6-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.
EN/UVLO

1

Analog InputActive High Enable for the device. A Resistor Divider on this pin from input supply to GND can be used to adjust the Undervoltage Lockout threshold. Do not leave floating. Refer to Section 8.3.2 for details.

OVLO

2

Analog InputTPS259470x, TPS259474x: A Resistor Divider on this pin from supply to GND can be used to adjust the Overvoltage Lockout threshold. This pin can also be used as an Active Low Enable for the device. Do not leave floating. Refer to Section 8.3.3 for details.

OVCSEL

Analog InputTPS259472x: Overvoltage Clamp Threshold Select Pin. Refer to Section 8.3.4 for details.

PG

3

Digital OutputTPS259472x, TPS259474x: Power Good indication. This pin is an Open Drain signal which is asserted High when the internal powerpath is fully turned ON and PGTH input exceeds a certain threshold. Refer to Section 8.3.11 for more details.

AUXOFF

Digital OutputTPS259470x: Auxiliary channel control signal. This pin is an Open Drain signal which is asserted High when the input supply is valid and channel has completed inrush sequence. This can be used to enable/disable the auxiliary supply eFuse to facilitate smooth switchover in a Priority power MUXing configuration. Refer to Section 8.3.10 for more details.

FLT

4

Digital OutputTPS259470x: Active low Fault event indicator. This pin is an Open Drain signal which will be pulled low when a fault is detected. Refer to Section 8.3.9 for more details.

PGTH

Analog InputTPS259472x, TPS259474x: Power Good Threshold. Refer to Section 8.3.11 for more details.

IN

5

Power

Power input

OUT

6

Power

Power output

DVDT

7

Analog OutputA capacitor from this pin to GND sets the output turn on slew rate. Leave this pin floating for the fastest turn on slew rate. Refer to Section 8.3.5.1 for details.

GND

8

Ground

This pin is the ground reference for all internal circuits and must be connected to system GND.

ILM

9

Analog OutputThis pin is a dual function pin used to limit and monitor the output current. An external resistor from this pin to GND sets the output current limit threshold during start-up as well as steady state. The pin voltage can also be used as analog output load current monitor signal. Do not leave floating. Refer to Section 8.3.5.2 or Section 8.3.5.3 for more details.

ITIMER

10

Analog OutputA capacitor from this pin to GND sets the overcurrent blanking interval during which the output current can temporarily exceed set current limit (but lower than fast-trip threshold) before the device overcurrent response takes action. Leave this pin open for fastest response to overcurrent events. Refer to Section 8.3.5.2 or Section 8.3.5.3 for more details.