SLVSFE3B November   2020  – May 2021 TPS2661


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Overload Protection and Fast-Trip
      2. 8.3.2 Reverse Current Blocking for Unipolar Current Inputs (4 - 20 mA, 0 - 20 mA)
      3. 8.3.3 OUTPUT/INPUT Cutoff During Over-Voltage, Under-Voltage Due to Miswiring
        1. Output Over-Voltage
        2. Output or Input Under-Voltage
      4. 8.3.4 External Power Supply(±Vs)
      5. 8.3.5 Loop Testing Without ±Vs Supply (Loop Power Mode in TPS26610 Only)
        1. Supply Sensing with VSNS For Loop Power Mode (TPS26610)
      6. 8.3.6 Enable Control (TPS26611 and TPS26612)
      7. 8.3.7 Signal Good Indicator (SGOOD)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Analog Input Protection for Current Inputs with TPS26610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure for Current Inputs with TPS26610
        1. Selecting ±Vs Supplies for TPS26610
        2. Selecting RBurden
        3. Selecting MODE Configuration for TPS26610
      3. 9.2.3 Application Performance Plots for Current Inputs with TPS26610
    3. 9.3 Typical Application: Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure for Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
        1. Selecting ±Vs Supplies for TPS26611
        2. Selecting MODE Configuration for TPS26611
        3. Selecting Bias Resistors R1, R2 for Setting Common Mode Voltage for Voltage Inputs
      3. 9.3.3 Application Performance Plots for V/I Inputs with TPS26611
    4. 9.4 System Examples
      1. 9.4.1 Power Supply Protection of 2-Wire Transmitter with TPS26612
      2. 9.4.2 Protection of 3-Wire Transmitters and Analog Output Modules with TPS26611/12
      3. 9.4.3 UART IO Protection with TPS26611/12
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overload Protection and Fast-Trip

The TPS2661x devices feature a fixed IOL: 32-mA typical, bidirectional current limit. For use in unipolar systems like 4-20-mA current loops where negative current is not desired, connect -Vs to GND pin to cutoff when there is a flow of reverse current (OUT to IN). If the current tries to exceed the IOL limit, the device regulates the current and eventually reducing the output voltage. Overload current threshold and time for overload protection can be selected by MODE pin. See Device Functional Modes for details. The power dissipation across the device during current regulation will be (VIN - VOUT) x IOUT and this could heat up the device and lead to thermal shutdown. After thermal shutdown device goes into auto retry. The mode pin selects the auto retry period. See Table 8-2 and Figure 8-21 for selection of auto retry period.

The TPS2661x devices also feature a fast trip comparator. During fast transient events like output short circuit, miswiring, hotplug, etc the current through the device increases rapidly. Due to limited bandwidth, the current limit amplifier cannot respond quickly to these events . Hence the fast-trip comparator architecture is included for fast turn OFF of the internal FET during these events. The device turns off the internal FETs within a time of t(FASTTRIP). See Timing Requirements in Specifications for t(FASTTRIP). The fast-trip circuit holds the internal FET off for a short duration (50μs), after which the device turns back on slowly, allowing the current-limit loop to regulate the output current to current limit as per MODE pin configuration. Figure 8-3 and Figure 8-5 illustrate the current limit behavior of TPS2661x devices. Figure 8-6 illustrates the fast-trip protection of TPS2661x devices and Figure 8-7 illustrates the auto-retry behavior in overload fault.

GUID-9D4BD659-7E38-4B16-A465-69140631B01E-low.gifFigure 8-3 Overload Protection and Fast-Trip
GUID-20200817-CA0I-SV0D-MPXG-QBW8CK9LDCTC-low.pngFigure 8-4 Current Limit Behavior for IOUT < 2 × IOLwith MODE = GND
GUID-20201030-CA0I-W59L-FF7G-26KQC5LKWBWJ-low.pngFigure 8-6 Fast-Trip Behavior
GUID-20200817-CA0I-11W6-08W8-ZSXKNJZXFQGW-low.pngFigure 8-5 Current Limit Behavior for IOUT > 2 × IOL with MODE = 180 kΩ
GUID-20201030-CA0I-MJKH-T08D-VKCQQ1G6SLPQ-low.pngFigure 8-7 Auto-Retry Behavior