SLVSFE3B November   2020  – May 2021 TPS2661

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Overload Protection and Fast-Trip
      2. 8.3.2 Reverse Current Blocking for Unipolar Current Inputs (4 - 20 mA, 0 - 20 mA)
      3. 8.3.3 OUTPUT/INPUT Cutoff During Over-Voltage, Under-Voltage Due to Miswiring
        1. 8.3.3.1 Output Over-Voltage
        2. 8.3.3.2 Output or Input Under-Voltage
      4. 8.3.4 External Power Supply(±Vs)
      5. 8.3.5 Loop Testing Without ±Vs Supply (Loop Power Mode in TPS26610 Only)
        1. 8.3.5.1 Supply Sensing with VSNS For Loop Power Mode (TPS26610)
      6. 8.3.6 Enable Control (TPS26611 and TPS26612)
      7. 8.3.7 Signal Good Indicator (SGOOD)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Analog Input Protection for Current Inputs with TPS26610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure for Current Inputs with TPS26610
        1. 9.2.2.1 Selecting ±Vs Supplies for TPS26610
        2. 9.2.2.2 Selecting RBurden
        3. 9.2.2.3 Selecting MODE Configuration for TPS26610
      3. 9.2.3 Application Performance Plots for Current Inputs with TPS26610
    3. 9.3 Typical Application: Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure for Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
        1. 9.3.2.1 Selecting ±Vs Supplies for TPS26611
        2. 9.3.2.2 Selecting MODE Configuration for TPS26611
        3. 9.3.2.3 Selecting Bias Resistors R1, R2 for Setting Common Mode Voltage for Voltage Inputs
      3. 9.3.3 Application Performance Plots for V/I Inputs with TPS26611
    4. 9.4 System Examples
      1. 9.4.1 Power Supply Protection of 2-Wire Transmitter with TPS26612
      2. 9.4.2 Protection of 3-Wire Transmitters and Analog Output Modules with TPS26611/12
      3. 9.4.3 UART IO Protection with TPS26611/12
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

+Vs = 15 V; –Vs = –15 V, MODE = OPEN, SGOOD = OPEN; EN/VSNS = OPEN; TA = 25º C (unless otherwise noted)

GUID-20210222-CA0I-W2JC-8K4R-CNXWMDN5RRHB-low.svg
+Vs = 15 V; -Vs = GND; VIN = VOUT
Figure 7-1 IQ-ON (IN+OUT) vs VIN in Normal Operation
GUID-20210222-CA0I-4ZKG-PV2M-LXNFPXMRXX3H-low.svg
+Vs = 30 V; –Vs = GND; VIN = VOUT + 1 V
Figure 7-3 IOL vs VIN for IOUT > 0
GUID-20210222-CA0I-Z1M3-DNPB-KHG6BPGFQNXQ-low.svg
VIN = VOUT + 1.5 V; MODE = Open or 180 kΩ
Figure 7-5 IOL-Pulse vs VIN
GUID-20210222-CA0I-1DTW-865P-83XXHXQMHQXQ-low.svgFigure 7-7 IFast-trip vs Temperature for IOUT < 0
GUID-20210223-CA0I-1KCN-CV2M-ZN2QD7V7ZCVL-low.svg
VIN = 0 V
Figure 7-9 (IOFF-Leakage-IN + IOFF-Leakage-OUT) vs VOUT
GUID-20210223-CA0I-NFVH-11GR-SNKB4SV1GZCR-low.svg
VIN = 0 V
Figure 7-11 IOFF-Leakage-OUT vs VOUT
GUID-20210222-CA0I-2NDS-2QJG-V9CZ2CWZSMFF-low.svgFigure 7-13 OUT OVLO Thresholds (w.r.t Vs) vs Temperature for TPS26612
GUID-20210222-CA0I-J4N4-WZJQ-THGWB2CMWRFL-low.svgFigure 7-15 IVs vs Vs in ON State
GUID-20210222-CA0I-83PQ-FS2R-DR6XKRGN8R2J-low.svgFigure 7-17 I-Vs vs -Vs in ON State
GUID-20210223-CA0I-D1HV-LGJP-9MTBGJMKVGQW-low.svg
IOUT = 60 mA, MODE = 180 kΩ
Figure 7-19 Thermal shutdown time vs Power Dissipation
GUID-20201030-CA0I-NNJQ-QZJD-ZT0FGZG8LGJS-low.pngFigure 7-21 Current Limit with MODE = OPEN
GUID-20201104-CA0I-XGQ2-TBDZ-FK0TD7MBRZRF-low.pngFigure 7-23 Fast-Trip Protection
GUID-20210222-CA0I-4RLM-KDLD-QZMQBJK4FRTN-low.svg
VIN = VOUT = 0 V
Figure 7-2 IQ (IN+OUT) vs Temperature in Normal Operation
GUID-20210222-CA0I-XRPZ-2V7V-VSZGVNFMKFP4-low.svg
VIN = VOUT - 1 V
Figure 7-4 IOL vs VIN for IOUT < 0
GUID-20210222-CA0I-FXDX-5KVK-XZXFHQGPC8SD-low.svgFigure 7-6 IFast-trip vs Temperature for IOUT > 0
GUID-20210223-CA0I-PPXL-DV7M-HVV6QS6ZDLM4-low.svg
VOUT = 0 V
Figure 7-8 (IOFF-Leakage-IN + IOFF-Leakage-OUT) vs VIN
GUID-20210223-CA0I-6B7W-XJ21-FQPHW98VGMXH-low.svg
VOUT = 0 V
Figure 7-10 IOFF-Leakage-IN vs VIN
GUID-20210222-CA0I-WJRG-MG9D-NV0GD5Q3SWJW-low.svgFigure 7-12 OUT OVLO Thresholds (w.r.t Vs) vs Temperature for TPS26611 and TPS26610
GUID-20210222-CA0I-SRTX-4BSC-L8NRNXHBLMVG-low.svgFigure 7-14 OUT and IN UVLO Thresholds (w.r.t -Vs) vs Temperature
GUID-20210222-CA0I-CHFC-DXTZ-PSN17X6JKN6P-low.svgFigure 7-16 IVs vs Vs in OFF State (EN = 0) for TPS26611 and TPS26612
GUID-20210222-CA0I-6FDR-Z9BX-8ZP1GVF1WCWB-low.svgFigure 7-18 RON vs Temperature
GUID-20201030-CA0I-B90G-BD6N-V9NH8KKSBV1X-low.pngFigure 7-20 Current Limit with MODE = GND
GUID-20201030-CA0I-MJKH-T08D-VKCQQ1G6SLPQ-low.pngFigure 7-22 Auto Retry with MODE = 180 kΩ