SPRS288H May   2008  – October 2021

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Voltage (VDD)
        1. 7.3.1.1 VDD Hysteresis
        2. 7.3.1.2 VDD Glitch Immunity
      2. 7.3.2 Implemented Window-Watchdog Settings
        1. 7.3.2.1 Timing Rules of Window-Watchdog
      3. 7.3.3 Watchdog Software Considerations
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Lower-Boundary Calculation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming Window-Watchdog Using an External Capacitor
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted).
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VOLLow-level output voltageVDD = 2 V to 6 V, IOL = 500 μA0.2V
VDD = 3.3 V IOL = 2 mA0.4
VDD = 6 V, IOL = 4 mA0.4
Power up reset voltage (1)VDD ≥ 1.1 V, IOL = 50 μA0.2V
VITNegative-going input threshold voltage (2)TPS3813K33-Q12.872.933V
TPS3813I50-Q14.454.554.65
VHYSHysteresisTPS3813K33-Q140mV
TPS3813I50-Q160
IIHHigh-level input currentWDI, WDRWDI = VDD = 6 V, WDR = VDD = 6 V–125125nA
WDTWDT = VDD = 6 V, VDD > VIT, RESET = High–125125
IILLow-level input currentWDI, WDRWDI = 0 V, WDR = 0 V, VDD = 6 V–125125
WDTWDT = 0 V, VDD > VIT,RESET = High–125125
IOHHigh-level output currentVDD = VIT + 0.2 V, VOH = VDD25nA
IDDSupply currentVDD = 2 V output unconnected913μA
VDD = 5 V output unconnected2025
CiInput capacitanceVI = 0 V to VDD5pF
(1) The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 μs/V.
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near to the supply terminals.