SLVSG89B April   2021  – January 2024 TPS3899-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Nomenclature
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD Hysteresis
      2. 7.3.2 User-Programmable Sense and Reset Time Delay
      3. 7.3.3 RESET/RESET Output
      4. 7.3.4 SENSE Input
        1. 7.3.4.1 Immunity to SENSE Pin Voltage Transients
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation (VDD > VDD(min))
      2. 7.4.2 Above Power-On-Reset But Less Than VDD(min) (VPOR < VDD < VDD(min))
      3. 7.4.3 Below Power-On-Reset (VDD < VPOR)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design 1: Dual Rail Monitoring with Power-Up Sequencing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1 Design 1: Dual Rail Monitoring with Power-Up Sequencing

A typical application for the TPS3899-Q1 is voltage rail monitoring and power-up sequencing as shown in
Figure 8-2. The TPS3899-Q1 can be used to monitor any rail above 0.8V. In this design application, two TPS3899-Q1 devices monitor two separate voltage rails and sequences the rails upon power-up. The TPS3899DL01-Q1 is used to monitor the 3.3V main power rail and the TPS3899PL16-Q1 is used to monitor the 1.8V rail provided by the LDO for other system peripherals. The RESET output of the TPS3899DL01-Q1 is connected to the enable (EN) input of the LDO with an external pull-up resistor RPULL-UP to the 3.3V power rail. The RESET output of the TPS3899PL16-Q1 is connected to the (RESET) input of the microcontroller. A reset event is initiated on either voltage supervisor when the VDD voltage is less than VIT- falling threshold voltage. For a system reset event, a push-button input is placed at the SENSE pin of the TPS3899DL01-Q1.

GUID-20210311-CA0I-XN2V-4GF0-THS8LQ2FQJHZ-low.svg Figure 8-1 TPS3899-Q1 Voltage Rail Monitor and Power-Up Sequencer Design Block Diagram