SLVSFM0C September   2020  – January 2024 TPS3899

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6.   Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 VDD Hysteresis
      2. 6.3.2 User-Programmable Sense and Reset Time Delay
      3. 6.3.3 RESET/RESET Output
      4. 6.3.4 SENSE Input
        1. 6.3.4.1 Immunity to SENSE Pin Voltage Transients
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation (VDD > VDD(min))
      2. 6.4.2 Above Power-On-Reset But Less Than VDD(min) (VPOR < VDD < VDD(min))
      3. 6.4.3 Below Power-On-Reset (VDD < VPOR)
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
      4. 7.2.4 Power Supply Recommendations
      5. 7.2.5 Layout
        1. 7.2.5.1 Layout Guidelines
        2. 7.2.5.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Typical Characteristics

Typical characteristics show the typical performance of the TPS3899 device. Test conditions are TA = 25°C,
VDD = 3.3V, and Rpull-up = 100kΩ, unless otherwise noted.

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Figure 5-3 Supply Current vs Supply Voltage
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Figure 5-5 VIT- Accuracy vs Temperature
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Figure 5-7 SENSE Glitch Immunity (VIT-) vs Overdrive
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VDD falling below VIT-
Figure 5-9 Propagation Delay vs Temperature
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Figure 5-11 RESET Delay vs CTR Capacitance
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Figure 5-13 SENSE Delay vs CTS Capacitance
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Figure 5-15 VOL vs Temperature
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Figure 5-4 SENSE Current vs VSENSE
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Figure 5-6 VHYS vs Temperature
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Figure 5-8 Startup Delay vs Temperature
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CTR = OPEN
Figure 5-10 Reset Time Delay vs Temperature
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CTS = OPEN
Figure 5-12 SENSE Delay vs Temperature
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Figure 5-14 VOL vs IOL