SLVS861F august 2008 – june 2020 TPS40210-Q1 , TPS40211-Q1
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Minimum On-Time and Off-Time Considerations
- 7.3.2 Current Sense and Overcurrent
- 7.3.3 Current Sense and Subharmonic Instability
- 7.3.4 Current Sense Filtering
- 7.3.5 Soft Start
- 7.3.6 BP Regulator
- 7.3.7 Shutdown (DIS/ EN Pin)
- 7.3.8 Control Loop Considerations
- 7.3.9 Gate Drive Circuit
- 7.3.10 TPS40211-Q1
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Duty Cycle Estimation
- 8.2.2.2 Inductor Selection
- 8.2.2.3 Rectifier Diode Selection
- 8.2.2.4 Output Capacitor Selection
- 8.2.2.5 Input Capacitor Selection
- 8.2.2.6 Current Sense and Current Limit
- 8.2.2.7 Current Sense Filter
- 8.2.2.8 Switching MOSFET Selection
- 8.2.2.9 Feedback Divider Resistors
- 8.2.2.10 Error Amplifier Compensation
- 8.2.2.11 R-C Oscillator
- 8.2.2.12 Soft-Start Capacitor
- 8.2.2.13 Regulator Bypass
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
Package Options
Refer to the PDF data sheet for device specific package drawings
Mechanical Data (Package|Pins)
- DGQ|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.2.2.10 Error Amplifier Compensation
While current mode control typically requires only Type II compensation, it is desirable to layout for Type III compensation to increase flexibility during design and development.
Current mode control boost converters have higher gain with higher output impedance, so it is necessary to calculate the control loop gain at the maximum output impedance, estimated by Equation 57.
The transconductance of the TPS40210-Q1 current-mode control can be estimated by Equation 58.
The maximum output impedance, ZOUT, can be estimated by Equation 59.
The modulator gain at the desired cross-over can be estimated by Equation 61.
The feedback compensation network needs to be designed to provide an inverse gain at the cross-over frequency for unit loop gain. This sets the compensation mid-band gain at a value calculated in Equation 62.
To set the mid-band gain of the error amplifier to KCOMP, use Equation 63.
R4 = 18.7 kΩ selected.
Place the zero at one 10th of the desired cross-over frequency.
C2 = 2200 pF selected.
Place a high-frequency pole at about five times the desired cross-over frequency and less than one-half the unity gain bandwidth of the error amplifier:
C4 = 47 pF selected.