SLUSDW9A June 2020 – June 2020 TPS51215A
The TPS51215A sets the overvoltage protection (OVP) when VSNS voltage reaches a level 20% (typ) higher than the target voltage. When an OV event is detected, the controller changes the output target voltage to 0 V. This usually turns off DRVH and forces DRVL to be on. When the inductor current begins to flow through the low-side MOSFET and reaches the negative OCL, DRVL is turned off and DRVH is turned on, for a minimum on-time.
After the minimum on-time expires, DRVH is turned off and DRVL is turned on again. This action minimizes the output node undershoot due to LC resonance. When the VSNS reaches 0 V, the driver output is latched as DRVH off, DRVL on.
The undervoltage protection (UVP) latch is set when the VSNS voltage remains lower than 68% (typ) of the REFIN voltage for 1 ms or longer. In this fault condition, the controller latches DRVH low and DRVL low and discharges the VOUT. UVP detection function is enabled after 1.2 ms of SMPS operation to ensure startup.
To release the OVP and UVP latches, toggle EN or adjust the V5IN voltage down and up beyond the undervoltage lockout threshold.