SLVSD26A April   2016  – January 2017 TPS54202

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Pulse Skip Mode
      3. 7.3.3  Error Amplifier
      4. 7.3.4  Slope Compensation and Output Current
      5. 7.3.5  Enable and Adjusting Under Voltage Lockout
      6. 7.3.6  Safe Startup into Pre-Biased Outputs
      7. 7.3.7  Voltage Reference
      8. 7.3.8  Adjusting Output Voltage
      9. 7.3.9  Internal Soft-Start
      10. 7.3.10 Bootstrap Voltage (BOOT)
      11. 7.3.11 Overcurrent Protection
        1. 7.3.11.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.11.2 Low-Side MOSFET Overcurrent Protection
      12. 7.3.12 Spread Spectrum
      13. 7.3.13 Output Overvoltage Protection (OVP)
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Eco-mode Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 TPS54202 8-V to 28-V Input, 5-V Output Converter
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Capacitor Selection
        2. 8.2.3.2 Bootstrap Capacitor Selection
        3. 8.2.3.3 Output Voltage Set Point
        4. 8.2.3.4 Undervoltage Lockout Set Point
        5. 8.2.3.5 Output Filter Components
          1. 8.2.3.5.1 Inductor Selection
          2. 8.2.3.5.2 Output Capacitor Selection
          3. 8.2.3.5.3 Feed-Forward Capacitor
      4. 8.2.4 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage range, VI VIN –0.3 30 V
EN –0.3 7 V
FB –0.3 7 V
Output voltage range, VO BOOT-SW –0.3 7 V
SW –0.3 30 V
SW (20 ns transient) –5 30 V
Operating junction temperature, TJ –40 150 °C
Storage temperature range, Tstg –65 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VI Input voltage range VIN 4.5 28 V
EN –0.1 7 V
FB –0.1 7 V
VO Output voltage range BOOT-SW –0.1 7 V
SW –0.1 28 V
TJ Operating junction temperature –40 125 °C

Thermal Information

THERMAL METRIC(1) TPS54202 UNIT
DDC ( SOT23)
6 PINS
RθJA Junction-to-ambient thermal resistance 89.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 39.5 °C/W
RθJB Junction-to-board thermal resistance 14.7 °C/W
ψJT Junction-to-top characterization parameter 1.2 °C/W
ψJB Junction-to-board characterization parameter 14.7 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, .

Electrical Characteristics

The electrical ratings specified in this section apply to all specifications in this document, unless otherwise noted. These specifications are interpreted as conditions that do not degrade the device parametric or functional specifications for the life of the product containing it. TJ = –40°C to +125°C, VIN = 4.5 V to 28 V, (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY
VIN Input voltage range 4.5 28 V
IQ Non switching quiescent current EN =5 V, VFB = 1 V 45 µA
IOFF Shut down current EN = GND 2 µA
VIN(UVLO) VIN under voltage lockout Rising VIN 3.9 4.2 4.4 V
Falling VIN 3.4 3.7 3.9 V
Hysteresis 400 480 560 mV
ENABLE (EN PIN)
V(EN_RISING) Enable threshold Rising 1.21 1.28 V
V(EN_FALLING) Falling 1.1 1.19 V
I(EN_INPUT) Input current VEN = 1 V 0.7 μA
I(EN_HYS) Hysteresis current VEN = 1.5 V 1.55 μA
FEEDBACK AND ERROR AMPLIFIER
VFB Feedback Voltage VIN = 12 V 0.581 0.596 0.611 V
PULSE SKIP MODE
I(SKIP)(1) Pulse skip mode peak inductor current threshold VIN = 24 V, VOUT = 5 V, L = 15 µH 300 mA
POWER STAGE
R(HSD) High-side FET on resistance TA = 25°C, VBST – SW = 6 V 148
R(LSD) Low-side FET on resistance TA = 25°C, VIN = 12 78
CURRENT LIMIT
I(LIM_HS) High side current limit 2.5 3.2 3.9 A
I(LIM_LS) Low side source current limit 2 3 4 A
OSCILLATOR
Fsw Centre switching frequency 390 500 590 kHz
OVER TEMPERATURE PROTECTION
Thermal Shutdown(1) Rising temperature 155 °C
Hysteresis 10 °C
Hiccup time 32768 Cycles
Not production tested

Timing Requirements

MIN TYP MAX UNIT
OVER CURRENT PROTECTION
tHIC_WAIT Hiccup up wait time 512 Cycles
tHIC_RESTART Hiccup up time before restart 16384 Cycles
tSS Soft-start time 5 mS
ON TIME CONTROL
tMIN_ON(1) Minimum on time, measured at 90% to 90% and 1-A loading 110 ns

Typical Characteristics

VIN = 12, unless otherwise specified

TPS54202 D001_SLVSD26.gif
Figure 1. Shutdown Quiescent Current vs Junction Temperature
TPS54202 D003_SLVSD26.gif
Figure 3. High-Side Resistance vs Junction Temperature
TPS54202 D005_SLVSD26.gif
Figure 5. Reference Voltage vs Junction Temperature
TPS54202 D007_SLVSD26.gif
Figure 7. High-Side Current Limit Threshold vs Junction Temperature
TPS54202 D009_SLVSD26.gif
Figure 9. BOOT-SW UVLO Threshold vs Junction Temperature
TPS54202 D011_SLVSD26.gif
Figure 11. EN Threshold vs Junction Temperature
TPS54202 D002_SLVSD26.gif
Figure 2. Non-Switching Operating Quiescent Current vs Junction Temperature
TPS54202 D004_SLVSD26.gif
Figure 4. Low-Side FET On Resistance vs Junction Temperature
TPS54202 D006_SLVSD26.gif
Figure 6. Centre Switching Frequency vs Junction Temperature
TPS54202 D008_SLVSD26.gif
Figure 8. Low-Side Current Limit Threshold vs Junction Temperature
TPS54202 D010_SLVSD26.gif
Figure 10. VIN UVLO Threshold vs Junction Temperature
TPS54202 D012_SLVSD26.gif
Figure 12. EN Hysteresis Current vs Junction Temperature