SLVS839F July   2008  – October 2014 TPS54331

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
    1.     TPS54331 (D Package) Efficiency
  5. Revision History
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency PWM Control
      2. 8.3.2  Voltage Reference (Vref)
      3. 8.3.3  Bootstrap Voltage (BOOT)
      4. 8.3.4  Enable and Adjustable Input Undervoltage Lockout (VIN UVLO)
      5. 8.3.5  Programmable Slow Start Using SS Pin
      6. 8.3.6  Error Amplifier
      7. 8.3.7  Slope Compensation
      8. 8.3.8  Current-Mode Compensation Design
      9. 8.3.9  Overcurrent Protection and Frequency Shift
      10. 8.3.10 Overvoltage Transient Protection
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Eco-mode™
      2. 8.4.2 Operation With VIN < 3.5 V
      3. 8.4.3 Operation With EN Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design with WEBENCH Tools
        2. 9.2.2.2  Switching Frequency
        3. 9.2.2.3  Output Voltage Set Point
        4. 9.2.2.4  Input Capacitors
        5. 9.2.2.5  Output Filter Components
          1. 9.2.2.5.1 Inductor Selection
        6. 9.2.2.6  Capacitor Selection
        7. 9.2.2.7  Compensation Components
        8. 9.2.2.8  Bootstrap Capacitor
        9. 9.2.2.9  Catch Diode
        10. 9.2.2.10 Output Voltage Limitations
        11. 9.2.2.11 Power Dissipation Estimate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Electromagnetic Interference (EMI) Considerations
  12. 12Device and Documentation Support
    1. 12.1 Custom Design with WEBENCH Tools
    2. 12.2 Device Support
      1. 12.2.1 Development Support
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

D Package
8-Pin SOIC
Top View
TPS54331 po2_lvs839.gif
DDA Package
8-Pin SO With PowerPAD™
Top View
TPS54331 po_DDA_lvs839_.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 BOOT O A 0.1-μF bootstrap capacitor is required between the BOOT and PH pins. If the voltage on this capacitor falls below the minimum requirement, the high-side MOSFET is forced to switch off until the capacitor is refreshed.
2 VIN I This pin is the 3.5- to 28-V input supply voltage.
3 EN I This pin is the enable pin. To disable, pull below 1.25 V. Float this pin to enable. Programming the input undervoltage lockout with two resistors is recommended.
4 SS I This pin is slow-start pin. An external capacitor connected to this pin sets the output rise time.
5 VSENSE I This pin is the inverting node of the transconductance (gm) error amplifier.
6 COMP O This pin is the error-amplifier output and the input to the PWM comparator. Connect frequency compensation components to this pin.
7 GND Ground pin
8 PH O The PH pin is the source of the internal high-side power MOSFET.
9 PowerPAD™ The PowerPAD is only available on the DDA package. For proper operation, the GND pin must be connected to the exposed pad