SLVS839F July   2008  – October 2014 TPS54331

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
    1.     TPS54331 (D Package) Efficiency
  5. Revision History
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency PWM Control
      2. 8.3.2  Voltage Reference (Vref)
      3. 8.3.3  Bootstrap Voltage (BOOT)
      4. 8.3.4  Enable and Adjustable Input Undervoltage Lockout (VIN UVLO)
      5. 8.3.5  Programmable Slow Start Using SS Pin
      6. 8.3.6  Error Amplifier
      7. 8.3.7  Slope Compensation
      8. 8.3.8  Current-Mode Compensation Design
      9. 8.3.9  Overcurrent Protection and Frequency Shift
      10. 8.3.10 Overvoltage Transient Protection
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Eco-mode™
      2. 8.4.2 Operation With VIN < 3.5 V
      3. 8.4.3 Operation With EN Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design with WEBENCH Tools
        2. 9.2.2.2  Switching Frequency
        3. 9.2.2.3  Output Voltage Set Point
        4. 9.2.2.4  Input Capacitors
        5. 9.2.2.5  Output Filter Components
          1. 9.2.2.5.1 Inductor Selection
        6. 9.2.2.6  Capacitor Selection
        7. 9.2.2.7  Compensation Components
        8. 9.2.2.8  Bootstrap Capacitor
        9. 9.2.2.9  Catch Diode
        10. 9.2.2.10 Output Voltage Limitations
        11. 9.2.2.11 Power Dissipation Estimate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Electromagnetic Interference (EMI) Considerations
  12. 12Device and Documentation Support
    1. 12.1 Custom Design with WEBENCH Tools
    2. 12.2 Device Support
      1. 12.2.1 Development Support
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Dissipation Estimate

The following formulas show how to estimate the device power dissipation under continuous-conduction mode (CCM) operations. These formulas should not be used if the device is working in the discontinuous-conduction mode (DCM) or pulse-skipping Eco-mode.

The device power dissipation includes:

  1. Conduction loss:
  2. Pcon = IOUT2 × RDS(on) × VOUT / VIN

    where

    • IOUT s the output current (A)
    • RDS(on) is the on-resistance of the high-side MOSFET (Ω)
    • VOUT is the output voltage (V)
    • VIN is the input voltage (V)
  3. Switching loss:
  4. Psw = 0.5 × 10-9 × VIN2 × IOUT × ƒSW

    where

    • ƒSW is the switching frequency (Hz)
  5. Gate charge loss:
  6. Pgc = 22.8 × 10-9 × ƒSW
  7. Quiescent current loss
  8. Pq = 0.11 × 10-3 × VIN

Therefore:

Ptot = Pcon + Psw + Pgc + Pq

where

  • Ptot is the total device power dissipation (W)

For given TA :

TJ = TA + Rth × Ptot

where

  • TJ is the junction temperature (°C)
  • TA is the ambient temperature (°C)
  • Rth is the thermal resistance of the package (°C/W)

For given TJMAX = 150°C:

TAMAX = TJMAX – Rth × Ptot

where

  • TJMAX is maximum junction temperature (°C)
  • TAMAX is maximum ambient temperature (°C)