SLVSAF1E October   2010  – May 2019

PRODUCTION DATA.

1. Features
2. Applications
3. Description
1.     Device Images
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
4. 7.4 Device Functional Modes
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
3. 8.2.3 Application Curves
9. Power Supply Recommendations
10. 10Layout
11. 11Device and Documentation Support
12. 12Mechanical, Packaging, and Orderable Information

• RTE|16
• RTE|16

#### 8.2.2.10 Power-Dissipation Estimate

The following formulas show how to estimate the IC power dissipation under continuous-conduction mode (CCM) operation. The power dissipation of the IC (PT) includes conduction loss (P(con)), dead-time loss (P(d)), switching loss (P(SW)), gate-drive loss (P(gd)) and supply-current loss (P(q)).

Equation 42.

where

• IO is the output current (A)
• rDS(on)(Temp) is the on-resistance of the high-side MOSFET at a given temperature (Ω)
Equation 43.

where

• f(SW) is the switching frequency (Hz)
Equation 44.

where

• VI is the input voltage (V)
Equation 45.
Equation 46.

Therefore:

Equation 47.

For a given TA, use Equation 48 to calculate the junction temperature.

Equation 48.

where

• TJ is the junction temperature (°C)
• TA is the ambient temperature (°C)
• RθJA is the thermal resistance of the package (°C/W)
• PT is the total device power dissipation (W)

For a given TJ(max) = 150°C, use Equation 49 to calculate the maximum ambient temperature.

Equation 49.

where

• TJ(max) is maximum junction temperature (°C)
• TA(max) is maximum ambient temperature (°C)

Additional power losses occur in the regulator circuit because of the inductor ac and dc losses and trace resistance that impact the overall efficiency of the regulator.