SLUSCC7C July 2016 – June 2018 TPS546C23
The devices also implement a fixed high-side MOSFET overcurrent (HSOC) protection to limit peak current, and prevent inductor saturation in the event of a short circuit. The devices detect an overcurrent event by sensing the voltage drop across the high-side MOSFET when it is on. If the peak current reaches the IHOSC level on any given cycle, the cycle terminates to prevent the current from increasing any further. High-side MOSFET overcurrent events are counted using the method shown in Figure 32. If the devices detect three consecutive overcurrent events (high-side or low-side), the converter responds by flagging the appropriate status registers, triggering the SMBALERT signal if it is not masked, and entering either continuous-restart-hiccup mode or latches off according to the IOUT_OC_FAULT_RESPONSE command. For accurate overcurrent protection for the high-side MOSFET, the PVIN and AVIN pins must have the same potential because split-rail operation is not supported. The IOUT_OC_FAULT_RESPONSE command can also be set to ignore the OC fault for debugging purposes. When the IOUT_OC_FAULT_RESPONSE command is set to ignore, the device continues to have cycle-by-cycle HSOC protection. Table 2 summarizes the fault-response scheme.