SLUSCC7C July 2016 – June 2018 TPS546C23
When the output voltage remains within the PGOOD window after the start-up period, PGOOD as an open-drain output is released, and rises to an externally supplied logic level. The PGOOD window is defined by OV warning limit and UV warning limit in PCT_OV_UV_WRN_FLT_LIMITS (MFR_SPECIFIC_07) (D7h), which can be programmed through the PMBus interface, as shown in Figure 34. The PGOOD pin pulls low upon any fault condition on default. Please refer to Table 2 for the possible sources to pull down the PGOOD pin.
The PGOOD signal can be connected to the CNTL pin of another device to provide additional controlled turnon and turnoff sequencing.
The OVW or PGOOD signal trips when the FB pin is prebiased to higher than 5% about the regulation level. This level of prebias is unusual and it is beneficial to flag a warning in this situation.
Pulling PGOOD pin high before the devices gets input power could cause PGOOD pin going high due to the limited pulldown capability in un-powered condition. If this is not desired, increase the pullup resistance or reduce the external pullup supply voltage.