SLUSDX1A September   2020  – August 2021 TPS563211

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Advanced Emulated Current Mode Control
      2. 7.3.2 Mode Selection and PG/SS Pin Function Configuration
      3. 7.3.3 Power Good (PG)
      4. 7.3.4 Soft Start and Pre-Biased Soft Start
      5. 7.3.5 Output Discharge through PG/SS Pin
      6. 7.3.6 Precise Enable and Adjusting Undervoltage Lockout
      7. 7.3.7 Overcurrent Limit and Undervoltage Protection
      8. 7.3.8 Overvoltage Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Operation
      4. 7.4.4 FCCM Operation
      5. 7.4.5 DCM Operation and Eco-Mode Operation
      6. 7.4.6 On-Time Extension for Large Duty Cycle Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor Selection
        7. 8.2.2.7 Undervoltage Lockout Set Point
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

On-Time Extension for Large Duty Cycle Operation

Minimum on time, TON_MIN, is the smallest duration of time that the high-side MOSFET can be on. TON_MIN is typically 45 ns in the device. Minimum off time, TOFF_MIN, is the smallest duration that the high-side MOSFET can be off. TOFF_MIN is typically 105 ns in the device. In CCM operation, TON_MIN and TOFF_MIN limit the voltage conversion range given a fixed switching frequency.

The minimum duty cycle allowed is:

Equation 7. GUID-20200903-CA0I-DJ1L-8QQM-MF2LZLRTWDV5-low.gif

The maximum duty cycle allowed is:

Equation 8. GUID-20200903-CA0I-DW8P-ZBSX-2DR4RS2V0BZV-low.gif

In the device, a frequency foldback scheme is employed to extend the maximum duty cycle when TOFF_MIN is reached. The switching frequency decreases once longer duty cycle is needed under low VIN conditions. With the duty increased, the on-time is extended until up to the maximum on-time, 6 μs. Wide range of frequency foldback allows the device output voltage stay in regulation with a much lower supply voltage VIN. This leads to a lower effective dropout voltage.

Given an output voltage, the maximum operation supply voltage can be found by:

Equation 9. GUID-20200903-CA0I-WQQD-MV5T-3FMKV213XDQM-low.gif

At lower supply voltage, the switching frequency decreases once TOFF_MIN is triggered. The minimum VIN without frequency foldback can be approximated by:

Equation 10. GUID-20200903-CA0I-J6JT-RTVJ-4NPF1J7NVCDN-low.gif

Taking considerations of power losses in the system with heavy load operation, VIN_MAX is higher than the result calculated in Equation 9. With frequency foldback, VIN_VIN is lowered by decreased fSW, as shown in Figure 7-4.

GUID-20200903-CA0I-GKNP-B4D0-J3XDGGMG5SXT-low.gif Figure 7-4 Frequency Foldback at Dropout (VOUT = 5 V)