SLVSAH5E December   2010  – May 2019

PRODUCTION DATA.

1. Features
2. Applications
3. Description
1.     Device Images
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
4. 7.4 Device Functional Modes
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
3. 8.2.3 Application Curves
9. Power Supply Recommendations
10. 10Layout
11. 11Device and Documentation Support
1. 11.1 Device Support
2. 11.2 Documentation Support
4. 11.4 Community Resources
6. 11.6 Electrostatic Discharge Caution
7. 11.7 Glossary
12. 12Mechanical, Packaging, and Orderable Information

• RTE|16
• RTE|16

8.2.2.10 Power-Dissipation Estimate

The following formulas show how to estimate the IC power dissipation under continuous-conduction mode (CCM) operation. The power dissipation of the IC (PT) includes conduction loss (P(con)), dead-time loss (P(d)), switching loss (P(SW)), gate-drive loss (P(gd)), and supply-current loss (P(q)).

Equation 42. Equation 43. Equation 44. Equation 45. Equation 46. where:

IO is the output current (A).
rDS(on)(Temp) is the on-resistance of the high-side MOSFET with given temperature (Ω).
VI is the input voltage (V).
f(SW) is the switching frequency (Hz).

So

Equation 47. For a given TA,

Equation 48. For a given TJ(max) = 150°C

Equation 49. where:

PT is the total device power dissipation (W).
TA is the ambient temperature (°C).
TJ is the junction temperature (°C).
RθJA is the thermal resistance of the package (°C/W).
TJ(max) is maximum junction temperature (°C).
TA(max) is maximum ambient temperature (°C).

There are additional power losses in the regulator circuit due to the inductor ac and dc losses and trace resistance that impact the overall efficiency of the regulator.