SLVSAH5E December   2010  – May 2019

PRODUCTION DATA.

1. Features
2. Applications
3. Description
1.     Device Images
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
4. 7.4 Device Functional Modes
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
3. 8.2.3 Application Curves
9. Power Supply Recommendations
10. 10Layout
11. 11Device and Documentation Support
1. 11.1 Device Support
2. 11.2 Documentation Support
4. 11.4 Community Resources
6. 11.6 Electrostatic Discharge Caution
7. 11.7 Glossary
12. 12Mechanical, Packaging, and Orderable Information

• RTE|16
• RTE|16

7.4.15 Small-Signal Model for Frequency Compensation

The TPS57114-Q1 device uses a transconductance amplifier for the error amplifier and readily supports two of the commonly used frequency-compensation circuits. Figure 33 shows the compensation circuits. High-bandwidth power-supply designs most likely implement Type 2 circuits using low-ESR output capacitors. In Type 2A, inclusion of one additional high-frequency pole attenuates high-frequency noise. Figure 33. Types of Frequency Compensation

The design guidelines for TPS57114-Q1 loop compensation are as follows:

1. Calculate the modulator pole, f(p,mod), and the ESR zero, f(z,mod), using Equation 14 and Equation 15. If the output voltage is a high percentage of the capacitor rating, it may be necessary to derate the output capacitor (C(OUT)). Use the manufacturer information for the capacitor to derate the capacitor value. Use Equation 16 and Equation 17 to estimate a starting point for the crossover frequency, f(c). Equation 16 is the geometric mean of the modulator pole and the ESR zero, and Equation 17 is the mean of the modulator pole and the switching frequency. Use the lower value of Equation 16 or Equation 17 as the maximum crossover frequency.
2. Equation 14. Equation 15. Equation 16. Equation 17. 3. Determine R3 by
4. Equation 18. where gm(ea) is the amplifier gain (245 µS), and gm(ps) is the power-stage gain (25 S).

5. Place a compensation zero at the dominant pole.
6. Equation 19. 7. Determine C1 by
8. Equation 20. 9. C2 is optional. Use it, if necessary, to cancel the zero from the ESR of C(OUT).
10. Equation 21. 