SLVS644E February 2006 – December 2014 TPS61080 , TPS61081

PRODUCTION DATA.

- 1 Features
- 2 Applications
- 3 Description
- 4 5-V To 12-V, 250-mA Step-Up DC-DC Converter
- 5 Revision History
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information

- DRC|10

- DRC|10

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

TPS6108x is a highly integrated boost regulator for up to 27-V output with integration of a PWM switch, a power diode as well as an input side isolation switch.TPS6108x adopts current mode control with constant PWM (pulse width modulation) frequency. The switching frequency can be configured to either 600 kHz or 1.2 MHz through the FSW pin.

To program the output voltage, select the values of R1 and R2 (See Figure 11) according to the following equation.

Equation 4.

A optimum value for R2 is around 50kΩ which sets the current in the resistor divider chain to 1.229 V/50 kΩ = 24.58 μA. The output voltage tolerance depends on the V_{FB} accuracy and the resistor divider.

A feed forward capacitor on the feedback divider, shown in Figure 11, improves transient response and phase margin. This network creates a low frequency zero and high frequency pole at

Equation 5.

Equation 6.

The frequency of the pole is determined by C1 and paralleled resistance of R1 and R2. For high output voltage, R1 is much bigger than R2. So

Equation 7.

The loop gains more phase margin from this network when (Fz+Fp)/2 is placed right at crossover frequency, which is approximately 15 kHz with recommended L and C. The typical value for the zero frequency is between 1 kHz to 10 kHz. For high output voltage, the zero and pole are further apart which makes the feed forward capacitor very effective. For low output voltage, the benefit of the feed forward capacitor is less visible. Table 3 gives the typical R1, R2 and the feed forward capacitor values at the certain output voltage. However, the transient response is not greatly improved which implies that the zero frequency is too high or low to increase the phase margin.

Output Voltage | R1 | R2 | C1(Feed Forward) |
---|---|---|---|

12V | 437kΩ | 49.9kΩ | 33pF |

16V | 600kΩ | 49.9kΩ | 42pF |

20V | 762kΩ | 49.9kΩ | 56pF |

25V | 582kΩ | 30.1kΩ | 120pF |

The 100-Ω resistor is added to reduce noise coupling from the OUT to the FB pin through the feed forward capacitor. Without the resistor, the regulator may oscillate at high output current.

The voltage at the SS pin clamps the internal reference voltage, which allows the output voltage to ramp up slowly. The soft start time is calculated as

Equation 8.

where

C_{ss} = soft start capacitor

I_{ss} = soft start bias current (TYP 5 μA)

1.229 V is the typical value of the reference voltage.

During start up, input current has to be supplied to charge the output capacitor. This current is proportional to rising slope of the output voltage, and peaks when output reaches regulation.

Equation 9.

Where

I_{in_cout} = additional input current for charging the output capacitor

The maximum input during soft start is

Equation 10.

Output overshoot can occur if the input current at startup exceeds the inductor saturation current and/or reaches current limit because the error amplifier loses control of the voltage feedback loop. The in-rush current can also pulldown input sources, potentially causing system reset. Therefore, select C_{ss} to make I_{in_ss} stay below the inductor saturation current, the IC overcurrent limit and the input's maximum supply current.

TPS6108x can also be configured for constant current output, as shown in the typical applications. In this configuration, a current sense resistor is connected to FB pin for output current regulation. In order to reduce power loss on the sense resistor, FB pin reference voltage can be lowered by connecting a resistor to the SS pin The new reference voltage is simply the resistor value times the SS pin bias current. However, keep in mind that this reference has higher tolerance due to the tolerance of the bias current and sense resistor, and the offset of the clamp circuit. Refer to the specification V_{CLP} and I_{SS} to calculate the tolerance as following.

Equation 11.

Where

K_{ref} = percentage tolerance of the FB reference voltage.

K_{Vclp} = percentage tolerance of the clamp circuit.

K_{lss} = percentage tolerance of the SS pin bias current.

K_{R} = percentage tolerance of the SS pin resistor.

Without considering the SS pin resistor tolerance, the FB reference voltage has ±5.6% under the room temperature.

Figure 12 shows typical application circuit for a step-up DC-DC converter.

DESIGN PARAMETERS | VALUES |
---|---|

Input Voltage Range | 2.5 V to 6 V |

Output Voltage | 12 V |

Transient Response | +/- 250 mV |

Input Voltage Ripple | +/- 50 mV |

Output Current | 250 mA |

Operating Frequency | 1.2 MHz |

Because the selection of the inductor affects steady state operation, transient behavior and loop stability, the inductor is the most important component in power regulator design. There are three important inductor specifications, inductor value, DC resistance and saturation current. Considering inductor value alone is not enough.

The inductance value of the inductor determines the inductor ripple current. It is generally recommended to set peak to peak ripple current given by Equation 4 to 30–40% of DC current. Also, the inductor value should not be beyond the range in the recommended operating conditions table. It is a good compromise of power losses and inductor size. Inductor DC current can be calculated as

Equation 12.

The internal loop compensation for PWM control is optimized for the external component shown in the typical application circuit with consideration of component tolerance. Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0A value depending on how the inductor vendor defines saturation current. Using an inductor with a smaller inductance value forces discontinuous PWM in which inductor current ramps down to zero before the end of each switching cycle. It reduces the boost converter’s maximum output current, causes large input voltage ripple and reduces efficiency. An inductor with larger inductance reduces the gain and phase margin of the feedback loop, possibly resulting in instability.

For these reasons, 10μH inductors are recommended for TPS61080 and 4.7μH inductors for TPS61081 for most applications. However, 10μH inductor is also suitable for 600 kHz switching frequency.

Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with the PWM switch and power diode. Although the TPS6108x has optimized the internal switches, the overall efficiency still relies on inductor’s DC resistance (DCR); Lower DCR improves efficiency. However, there is a trade off between DCR and inductor size, and shielded inductors typically have higher DCR than unshielded ones. Table 5 list recommended inductor models.

TPS61080 | L (μH) |
DCR MAX (mΩ) |
SATURATION CURRENT (A) |
Size (L×W×H mm) |
VENDOR |
---|---|---|---|---|---|

VLCF4018T | 10 | 188 | 0.74 | 4.0 × 4.0 × 1.8 | TDK |

CDRH4D16NP | 10 | 118 | 0.96 | 4.0 × 4.0 × 1.8 | Sumida |

LQH43CN100K | 10 | 240 | 0.65 | 4.5 × 3.6 × 2.6 | Murata |

TPS61081 | L (μH) |
DCR MAX (mΩ) |
SATURATION CURRENT (A) |
Size (L×W×H mm) |
VENDOR |

VLCF5020T | 4.7 | 122 | 1.74 | 5.0 × 5.0 × 2.0 | TDK |

VLCF5014A | 6.8 | 190 | 1.4 | 5.0 × 5.0 × 1.4 | TDK |

CDRH4D14/HP | 4.7 | 140 | 1.4 | 4.8 × 4.8 × 1.5 | Sumida |

CDRH4D22/HP | 10 | 144 | 1.5 | 5.0 × 5.0 × 2.4 | Sumida |

The output capacitor is mainly selected to meet output ripple and loop stability requirements. This ripple voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by

Equation 13.

V_{ripple} = Peak to peak output ripple.

For VIN = 3.6V, V_{OUT} = 20 V, and Fs = 1.2 MHz, 0.1% ripple (20mV) would require 1.0μ capacitor, however, the minimum recommended output capacitor for control loop stability is 4.7 μF. The output capacitor value must be less than 30 µF to ensure the startup current charges the output capacitor to the input voltage in less than 1.7ms. For this value, ceramic capacitors are a good choice for its size, cost and availability.

The additional output ripple component caused by ESR is calculated using:

Equation 14.

Due to its low ESR, V_{ripple_ESR} can be neglected for ceramic capacitors, but must be considered if tantalum or electrolytic capacitors are used.

During a load transient, the output capacitor at the output of the boost converter has to supply or absorb transient current before the inductor current ramps up its steady state value. Larger capacitors always help to reduce the voltage over and under shoot during a load transient. A larger capacitor also helps loop stability. Care must be taken when evaluating a ceramic capacitor’s derating under dc bias, aging and AC signal. For example, larger form factor capacitors (in 1206 size) have their self resonant frequencies in the range of the switching frequency. So the effective capacitance is significantly lower. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, almost leave margin on voltage rating to ensure adequate capacitance.

See *Device Support* for popular ceramic capacitor vendors.

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