SLVS873D June   2015  – April 2016 TPS61098 , TPS610981 , TPS610982 , TPS610985 , TPS610986 , TPS610987

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Boost Controller Operation
      2. 8.3.2 Pass-Through Operation
      3. 8.3.3 LDO / Load Switch Operation
      4. 8.3.4 Start Up and Power Down
      5. 8.3.5 Over Load Protection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation Modes by MODE Pin
        1. 8.4.1.1 Active Mode
        2. 8.4.1.2 Low Power Mode
      2. 8.4.2 Burst Mode Operation under Light Load Condition
      3. 8.4.3 Pass-Through Mode Operation
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 VMAIN to Power MCU and VSUB to Power Subsystem
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Device Choice
          2. 9.2.1.2.2 Maximum Output Current
          3. 9.2.1.2.3 Inductor Selection
          4. 9.2.1.2.4 Capacitor Selection
          5. 9.2.1.2.5 Control Sequence
        3. 9.2.1.3 Application Curves
      2. 9.2.2 VMAIN to Power the System in Low Power Mode
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 VSUB to Power the System in Active Mode
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage VIN, SW, VMAIN, VSUB -0.3 4.7 V
MODE -0.3 5.0 V
Operating junction temperature, TJ –40 150 °C
Storage temperature range, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±1000 V
Charged Device Model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±250
(1) JEDEC document JEP155 states that 500V HBM rating allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250V CDM rating allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VIN Input voltage range 0.7 4.5 V
V(MAIN) Boost converter output voltage range 2.2 4.3 V
V(SUB) Load switch / LDO outut voltage range 1.8 3.7 V
L Effective inductance range 1.54 4.7 6.11 µH
CBAT Effective input capacitance range at input(1) 5 µF
CO1 Effective output capacitance range at VMAIN pin for boost converter output(1) 5 10 22 µF
CO2 Effective output capacitance range at VSUB pin for LDO output(1) 1(2) 5 10 µF
Effective output capacitance range at VSUB pin for load switch output(1)(3) 1 2.2 µF
TJ Operating virtual junction temperature –40 125 °C
(1) Effective value. Ceramic capacitor’s derating effect under bias should be considered. Choose the right nominal capacitance by checking capacitor DC bias characteristics.
(2) If LDO output current is lower than 20 mA, the minimum effective output capacitance value can be lower to 0.5 µF.
(3) With load switch version, the output capacitor at VSUB pin is only required if smaller voltage ripple is needed.

7.4 Thermal Information

THERMAL METRIC(1) TPS61098x UNIT
DSE 6 PINS
RθJA Junction-to-ambient thermal resistance 207.3 °C/W
RθJCtop Junction-to-case (top) thermal resistance 118.9
RθJB Junction-to-board thermal resistance 136.4
ψJT Junction-to-top characterization parameter 8.3
ψJB Junction-to-board characterization parameter 136.4
RθJCbot Junction-to-case (bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

TJ = -40°C to 125°C and VIN = 0.7 V to 4.5 V. Typical values are at VIN = 1.5 V, TJ = 25°C, unless otherwise noted.
PARAMETER VERSION TEST CONDITIONS MIN TYP MAX UNIT
Power Supply
VIN Input voltage range TPS61098x 0.7 4.5 V
VIN(start) Minimum input voltage at startup TPS61098x RLoad ≥ 3 kΩ (1) 0.7 V
IQ(VIN) Quiescent current into VIN pin
in Active Mode
TPS61098x MODE = High, Boost or Pass-through
No Load, No Switching
TJ = -40 °C to 85 °C
2 4 µA
Quiescent current into VIN pin
in Low Power Mode
TPS61098x MODE = Low, Boost or Pass-through
No Load, No Switching
5 90 nA
IQ(VMAIN) Quiescent current into VMAIN pin
in Active Mode
TPS61098/1/5/6/7 MODE = High, Boost or Pass-through
No Load, No Switching
TJ = -40 °C to 85 °C
15 23 µA
TPS610982 MODE = High, Boost or Pass-through
No Load, No Switching
TJ = -40 °C to 85 °C
18 23 µA
Quiescent current into VMAIN pin
in Low Power Mode
TPS61098/1/7 MODE = Low, Boost or Pass-through
No Load, No Switching
TJ = 25 °C
300 400 nA
TPS61098/1/5/6/7 MODE = Low, Boost or Pass-through
No Load, No Switching
TJ = -40 °C to 85 °C
300 800 nA
TPS610982 MODE = Low, Boost or Pass-through
No Load, No Switching
TJ = -40 °C to 85 °C
4 10 µA
ILKG(SW) Leakage current of SW pin
(from SW pin to GND pin)
TPS61098x V(MAIN) = V(SW) = 4.7 V, No Load
TJ = -40 °C to 85 °C
5 100 nA
ILKG(MAIN) Leakage current of VMAIN pin
(from VMAIN pin to SW pin)
TPS61098x V(MAIN) = 4.7 V, V(SW) = 0 V, No Load
TJ = -40 °C to 85 °C
10 200 nA
ILKG(SUB) Leakage current of VSUB pin
(from VMAIN pin to VSUB pin)
TPS61098/1/5/6/7 MODE = Low, V(MAIN) = 4.7 V, V(SUB) = 0 V
TJ = -40 °C to 85 °C
10 150 nA
ILKG(MODE) Leakage current into MODE pin TPS61098x V(MODE) = 5 V
TJ = -40 °C to 85 °C
5 30 nA
Power Switch
RDS(on)_LS Low side switch on resistance TPS61098/7 MODE = Low 600 1000
MODE = High 300 600
TPS610981/2/6 MODE = Low / High 350 650
TPS610985 MODE = Low / High 400 700
RDS(on)_HS Rectifier on resistance TPS61098/7 MODE = Low 700 1000
MODE = High 450 700
TPS610981/2/6 MODE = Low / High 500 700
TPS610985 MODE = Low / High 550 750
R(LS) Load switch on resistance TPS610985/6 1.2 2 Ω
V(Dropout) LDO dropout voltage TPS61098/1/2/7 ISUB = 50 mA 60 100 mV
ILH Inductor current ripple TPS61098x 100 mA
ILIM(BST) Boost switch current limit TPS61098x 0.7 V < VIN < V(MAIN) 350 500 650 mA
ILIM(SUB) VSUB output current limit TPS61098x TJ = -20 °C to 125 °C 200 mA
I(DISCH) Discharge current from VSUB pin to GND pin TPS610981/5/6/7 MODE = Low, V(SUB) = 3 V 5 8 mA
Output
V(MAIN) Boost converter output voltage TPS61098/7 MODE = High, VIN < V(PSTH)
Burst mode, open loop
4.45 V
MODE = High, VIN < V(PSTH)
PWM mode, open loop
4.142 4.27 4.398 V
MODE = Low, VIN < V(PSTH)
Burst mode, open loop
2.3 V
MODE = Low, VIN < V(PSTH)
PWM mode, open loop
2.163 2.23 2.297 V
TPS610981 MODE = High / Low, VIN < V(PSTH)
Burst mode, open loop
3.4 V
MODE = High / Low, VIN < V(PSTH)
PWM mode, open loop
3.201 3.3 3.399 V
TPS610982 MODE = High / Low, VIN < V(PSTH)
Burst mode, open loop
3.4 V
MODE = High / Low, VIN < V(PSTH)
PWM mode, open loop
3.201 3.3 3.399 V
TPS610985 MODE = High / Low, VIN < V(PSTH)
Burst mode, open loop
3.1 V
MODE = High / Low, VIN < V(PSTH)
PWM mode, open loop
2.91 3.0 3.09 V
TPS610986 MODE = High / Low, VIN < V(PSTH)
Burst mode, open loop
3.4 V
MODE = High / Low, VIN < V(PSTH)
PWM mode, open loop
3.201 3.3 3.399 V
V(SUB) LDO output voltage
(LDO version)
TPS61098/7 MODE = High 3.038 3.1 3.162 V
TPS610981 MODE = High 2.94 3.0 3.06 V
TPS610982 MODE = High / Low 2.744 2.8 2.856 V
V(PSTH) Pass-through mode threshold TPS61098/7 MODE = High, VIN rising 4.4 V
MODE = High, Hysteresis 0.1 V
MODE = Low, VIN rising 2.25 V
MODE = Low, Hysteresis 0.1 V
TPS610981 MODE = High / Low, VIN rising 3.35 V
MODE = High / Low, Hysteresis 0.1 V
TPS610982 MODE = High / Low, VIN rising 3.35 V
MODE = High / Low, Hysteresis 0.1 V
TPS610985 MODE = High / Low, VIN rising 3.05 V
MODE = High / Low, Hysteresis 0.1 V
TPS610986 MODE = High / Low, VIN rising 3.35 V
MODE = High / Low, Hysteresis 0.1 V
PSRR Power-supply rejection ratio from LDO input to output TPS61098/1/2/7 f = 1kHz, CO2 = 10 µF, ISUB = 10 mA
MODE = High
40 dB
TPS610982 f = 1kHz, CO2 = 10 µF, ISUB = 10 mA
MODE = Low
28 dB
tstup_LDO VSUB startup time
(LDO version and load switch version)
TPS61098x No Load
Time from MODE high to 90% of V(SUB)
1 ms
Control Logic
VIL MODE input low voltage TPS61098x 0.4 V
VIH MODE input high voltage TPS61098x 1.2 V
Overtemperature protection TPS61098x 150 °C
Overtemperature hysteresis TPS61098x 25 °C
(1) TPS61098x is able to drive RLoad > 150 Ω after VMAIN is established over 1.8 V.

7.6 Typical Characteristics

TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D001_SLVS873.gif
TPS61098, '1, '5, '6 MODE = High
Figure 1. IQ into VMAIN Pin at Active Mode vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D035_SLVS873.gif
TPS610982 MODE = High
Figure 3. IQ into VMAIN Pin at Active Mode vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D021_SLVS873.gif
TPS61098, '7 MODE = High
Figure 5. Rectifier On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D023_SLVS873.gif
TPS61098, '7 MODE = Low
Figure 7. Rectifier On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D003_SLVS873.gif
TPS610981 MODE = High / Low
Figure 9. Rectifier On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D037_SLVS873.gif
TPS610982 MODE = High / Low
Figure 11. Rectifier On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D039_SLVS873.gif
TPS610985 MODE = High / Low
Figure 13. Rectifier on Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D041_SLVS873.gif
TPS610986 MODE = High / Low
Figure 15. Rectifier on Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D005_SLVS873.gif
TPS61098x VIN < V(MAIN)
Figure 17. Current Limit vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D007_SLVS873.gif
TPS61098, '7 MODE = High V(MAIN) = 4.3 V
Figure 19. Boost Efficiency vs Output Current
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D009_SLVS873.gif
TPS610981 MODE = High V(MAIN) = 3.3 V
Figure 21. Boost Efficiency vs Output Current
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D026_SLVS873.gif
TPS610982 MODE = High V(MAIN) = 3.3 V
Figure 23. Boost Efficiency vs Output Current
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D044_SLVS873.gif
TPS610985 Mode = High V(MAIN) = 3 V
Figure 25. Boost Efficiency vs Output Current
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D046_SLVS873.gif
TPS610986 MODE = High V(MAIN) = 3.3 V
Figure 27. Boost Efficiency vs Output Current
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D011_SLVS873.gif
TPS61098, '7 MODE = High V(MAIN) = 4.3 V
Figure 29. Boost Load Regulation
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D013_SLVS873.gif
TPS610981 MODE = High V(MAIN) = 3.3 V
Figure 31. Boost Load Regulation
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D028_SLVS873.gif
TPS610982 MODE = High V(MAIN) = 3.3 V
Figure 33. Boost Load Regulation
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D048_SLVS873.gif
TPS610985 MODE = High V(MAIN) = 3 V
Figure 35. Boost Load Regulation
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D050_SLVS873.gif
TPS610986 MODE = High V(MAIN) = 3.3 V
Figure 37. Boost Load Regulation
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D015_SLVS873.gif
TPS610981 MODE = High VIN = 2.5 V
Figure 39. LDO Load Regulation
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D030_SLVS873.gif
TPS610982 MODE = High VIN = 2.5 V
Figure 41. LDO Load Regulation
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D017_SLVS873.gif
TPS610981 MODE = Low No Load
Figure 43. Input Current vs Input Voltage
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D031_SLVS873.gif
TPS610982 MODE = Low No Load
Figure 45. No Load Input Current vs Input Voltage
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D051_SLVS873.gif
TPS610985 MODE = Low V(MAIN) = 3 V
Figure 47. Input Current vs Input Voltage
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D019_slvs873.gif
TPS61098. '7 MODE = High CO2 = 10 µF
VIN - VOUT = 4.3 V - 3.1 V = 1.2 V
Figure 49. LDO PSRR vs Frequency
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D033_SLVS873.gif
TPS610982 MODE = Low CO2 = 10 µF
VIN - VOUT = 3.3 V - 2.8 V = 0.5 V
Figure 51. LDO PSRR vs Frequency
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D002_SLVS873.gif
TPS61098, '1, '5, '6 MODE = Low
Figure 2. IQ into VMAIN Pin at Low Power Mode vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D036_SLVS873.gif
TPS610982 MODE = Low
Figure 4. IQ into VMAIN Pin at Low Power Mode vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D022_SLVS873.gif
TPS61098, '7 MODE = High
Figure 6. Low Side Switch On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D024_SLVS873.gif
TPS61098, '7 MODE = Low
Figure 8. Low Side Switch On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D004_SLVS873.gif
TPS610981 MODE = High / Low
Figure 10. Low Side Switch On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D038_SLVS873.gif
TPS610982 MODE = High / Low
Figure 12. Low Side Switch On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D040_SLVS873.gif
TPS610985 MODE = High / Low
Figure 14. Low Side Switch On Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D042_SLVS873.gif
TPS610986 MODE = High / Low
Figure 16. Low Side Switch on Resistance vs Temperature
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D006_SLVS873.gif
TPS61098, '7 MODE = Low V(MAIN) = 2.2 V
Figure 18. Boost Efficiency vs Output Current
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D008_SLVS873.gif
TPS610981 MODE = Low V(MAIN) = 3.3 V
Figure 20. Boost Efficiency vs Output Current
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D025_SLVS873.gif
TPS610982 MODE = Low V(MAIN) = 3.3 V
Figure 22. Boost Efficiency vs Output Current
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D043_SLVS873.gif
TPS610985 Mode = Low V(MAIN) = 3 V
Figure 24. Boost Efficiency vs Output Current
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D045_SLVS873.gif
TPS610986 Mode = Low V(MAIN) = 3.3 V
Figure 26. Boost Efficiency vs Output Current
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D010_SLVS873.gif
TPS61098, '7 MODE = Low V(MAIN) = 2.2 V
Figure 28. Boost Load Regulation
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D012_SLVS873.gif
TPS610981 MODE = Low V(MAIN) = 3.3 V
Figure 30. Boost Load Regulation
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D027_SLVS873.gif
TPS610982 MODE = Low V(MAIN) = 3.3 V
Figure 32. Boost Load Regulation
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D047_SLVS873.gif
TPS610985 MODE = Low V(MAIN) = 3 V
Figure 34. Boost Load Regulation
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D049_SLVS873.gif
TPS610986 MODE = Low V(MAIN) = 3.3 V
Figure 36. Boost Load Regulation
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D014_SLVS873.gif
TPS61098, '7 MODE = High VIN = 3.6 V
Figure 38. LDO Load Regulation
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D029_SLVS873.gif
TPS610982 MODE = Low VIN = 2.5 V
Figure 40. LDO Load Regulation
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D016_slvs873.gif
TPS61098, '7 MODE = Low No Load
Figure 42. Input Current vs Input Voltage
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D018_SLVS873.gif
TPS610981 MODE = High No Load
Figure 44. Input Current vs Input Voltage
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D032_SLVS873.gif
TPS610982 MODE = High No Load
Figure 46. No Load Input Current vs Input Voltage
(Active Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D053_SLVS873.gif
TPS610986 MODE = Low V(MAIN) = 3.3 V
Figure 48. Input Current vs Input Voltage
(Low Power Mode)
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D020_slvs873.gif
TPS610981 MODE = High CO2 = 10 µF
VIN - VOUT = 3.3 V - 3 V = 0.3 V
Figure 50. LDO PSRR vs Frequency
TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 D034_SLVS873.gif
TPS610982 MODE = High CO2 = 10 µF
VIN - VOUT = 3.3 V - 2.8 V = 0.5 V
Figure 52. LDO PSRR vs Frequency
(Active Mode)