SLVS892F December 2008 – April 2019 TPS61175
Once the PWM switch is turned on, the TPS61175 has minimum ON pulse width of 60 ns. This sets the limit of the minimum duty cycle of the PWM switch, and it is independent of the set switching frequency. When operating conditions result in the TPS61175 having a minimum ON pulse width less than 60 ns, the IC enters pulse-skipping mode. In this mode, the device keeps the power switch off for several switching cycles to keep the output voltage from rising above the regulated voltage. This operation typically occurs in light load condition when the PWM operates in discontinuous mode. Pulse skipping increases the output voltage ripple, see Figure 15.
When setting switching frequency higher than 1.2 MHz, TI recommends using an external synchronous clock as switching frequency to ensure pulse-skipping function works at light load. When using the internal switching frequency above 1.2 MHz, the pulse-skipping operation may not function. When the pulse-skipping function does not work at light load, the TPS61175 always runs in PWM mode with minimum ON pulse width. To keep the output voltage in regulation, a minimum load is required. The minimum load is related to the input voltage, output voltage, switching frequency, external inductor value and the maximum value of the minimum ON pulse width. Use Equation 1 and Equation 2 to calculate the required minimum load at the worst case. The maximum tmin_ON could be estimated to 80 ns. CSW is the total parasite capacitance at the switching node SW pin. It could be estimated to 100 pF.