SLVSDA7E February 2017 – August 2019 TPS61178
The output capacitor is mainly selected to meet the requirements at load transient or steady state. Then the loop is compensated for the output capacitor selected. The output ripple voltage is related to the equivalent series resistance (ESR) of the capacitor and its capacitance. Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by Equation 12:
The additional output ripple component caused by ESR is calculated by Equation 13:
For the ceramic capacitor, the ESR ripple can be neglected. However, for the tantalum or electrolytic capacitors, it must be considered if used.
The minimum ceramic output capacitance needed to meet a load transient requirement can be estimated using Equation 14:
Care must be taken when evaluating a ceramic capacitor’s derating under the DC bias. Ceramic capacitors can derate by as much as 70% of its capacitance at its rated voltage. Therefore, enough margins on the voltage rating should be considered to ensure adequate capacitance at the required output voltage.
In applications of TPS61178x, it is recommended to run the converter with a reasonable amount of effective output capacitance, for instance 3 x 22-μF X5R or X7R MLCC capacitors connected in parallel.
If the load disconnect FET is connected, the output capacitor should be split shown in Figure 23. COUT2 should be no larger than 10 x COUT1 to avoid the inrush current when turning on the disconnect FET.