SLVSAL5E November   2011  – October 2021 TPS62150 , TPS62150A , TPS62151 , TPS62152 , TPS62153

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings (1)
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Enable / Shutdown (EN)
      2. 8.3.2 Soft Start or Tracking (SS/TR)
      3. 8.3.3 Power Good (PG)
      4. 8.3.4 Pin-Selectable Output Voltage (DEF)
      5. 8.3.5 Frequency Selection (FSW)
      6. 8.3.6 Undervoltage Lockout (UVLO)
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse-Width Modulation (PWM) Operation
      2. 8.4.2 Power-Save Mode Operation
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current-Limit and Short-Circuit Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Output Voltage
        2. 9.2.2.2 External Component Selection
          1. 9.2.2.2.1 Inductor Selection
          2. 9.2.2.2.2 Capacitor Selection
            1. 9.2.2.2.2.1 Output Capacitor
            2. 9.2.2.2.2.2 Input Capacitor
            3. 9.2.2.2.2.3 Soft-Start Capacitor
        3. 9.2.2.3 Tracking Function
        4. 9.2.2.4 Output Filter and Loop Stability
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 LED Power Supply
      2. 9.3.2 Active Output Discharge
      3. 9.3.3 Inverting Power Supply
      4. 9.3.4 Various Output Voltages
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

over operating junction temperature (TJ = –40°C to 125°C), typical values at VIN = 12 V and TA = 25°C (unless otherwise noted)
PARAMETERTEST CONDITIONSMINNOMMAXUNIT
SUPPLY
VINInput voltage range(1)317V
IQOperating quiescent currentEN = High, IOUT = 0 mA, device not switching1730µA
TA = –40°C to +85°C1725
ISDShutdown current(2)EN = Low1.525µA
TA = –40°C to +85°C1.54
VUVLOUndervoltage lockout thresholdFalling input voltage (PWM mode operation)2.62.72.8V
Hysteresis200mV
TSDThermal shutdown temperature160°C
Thermal shutdown hysteresis20
CONTROL (EN, DEF, FSW, SS/TR, PG)
VHHigh level input threshold voltage (EN, DEF, FSW)0.90.65V
VLLow level input threshold voltage (EN, DEF, FSW)0.450.3V
ILKGInput leakage current (EN, DEF, FSW)EN = VIN or GND; DEF, FSW = VOUT or GND0.011µA
VTH_PGPower-good threshold voltageRising (%VOUT)92%95%98%
Falling (%VOUT)87%90%94%
VOL_PGPower-good output low voltageIPG = –2 mA0.070.3V
ILKG_PGInput leakage current (PG)VPG = 1.8 V1400nA
ISS/TRSS/TR pin source current2.32.52.7µA
POWER SWITCH
rDS(on)High-side MOSFET ON-resistanceVIN ≥ 6 V90170mΩ
VIN = 3 V120
Low-side MOSFET ON-resistanceVIN ≥ 6 V4070mΩ
VIN = 3 V50
ILIMFHigh-side MOSFET forward current limit(3)VIN = 12 V, TA = 25°C1.41.72.2A
OUTPUT
ILKG_FBInput leakage current (FB)TPS62150, VFB = 0.8 V1100nA
VOUTOutput voltage range (TPS62150)VIN ≥ VOUT0.96.0V
DEF (output voltage programming)DEF = 0 (GND)VOUT
DEF = 1 (VOUT)VOUT + 5%
Initial output voltage accuracy(4)PWM mode operation, VIN ≥ VOUT + 1 V785.6800814.4mV
PWM mode operation, VIN ≥ VOUT + 1 V,
TA = –10°C to 85°C		788.0800812.8
Power Save Mode operation, COUT = 22 µF781.6800822.4
Load regulation(5)VIN = 12 V, VOUT = 3.3 V, PWM mode operation0.05%/A
Line regulation(5)3 V ≤ VIN ≤ 17 V, VOUT = 3.3 V, IOUT = 1 A, PWM mode operation0.02%/V
(1) The device is still functional down to undervoltage lockout (see parameter VUVLO).
(2) Current into AVIN+PVIN pins
(3) This is the static current limit. It can be temporarily higher in applications due to internal propagation delay (see Section 8.4.4).
(4) This is the accuracy provided at the FB pin for the adjustable VOUT version (line and load regulation effects are not included). For the fixed voltage versions, the (internal) resistive divider is included.
(5) Line and load regulation depend on external component selection and layout (see Figure 9-16 and Figure 9-17).