SLVSDD1E December 2017 – January 2019 TPS62800 , TPS62801 , TPS62802 , TPS62806 , TPS62807 , TPS62808
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The output voltage is set with a single external resistor connected between the VSEL/MODE pin and GND. Once the device has been enabled and the control logic as well as the internal reference have been powered up, a R2D (resistor to digital) conversion is started to detect the external resistor RVSEL within the regulator startup delay time tStartup_delay. An internal current source applies current through the external resistor and an internal ADC reads back the resulting voltage level. Depending on the level, an internal feedback divider network is selected to set the correct output voltage. Once this R2D conversion is finished, the current source is turned off to avoid current flow through the external resistor.
After power up, the pin is configured as an input for Mode Selection. Therefore, the output voltage is set only once. If the Mode selection function is used in combination with the VSEL function, ensure that there is no additional current path or capacitance greater than 30pF total to GND, during R2D conversion. Otherwise the additional current to GND is interpreted as a lower resistor value and a false output voltage will be set. Table 1 lists the correct resistor values for RVSEL to set the appropriate output voltages. The R2D converter is designed to operate with resistor values out of the E96 table and requires 1% resistor value accuracy. The external resistor RVSEL is not a part of the regulator feedback loop and has therefore no impact on the output voltage accuracy. Ensure that there is no other leakage path than the RVSEL resistor at the VSEL/MODE pin during an undervoltage lockout event. Otherwise a false output voltage will be set.
Connecting VSEL/MODE to GND selects a pre-defined output voltage (TPS62800 = 0.7 V, TPS62801 = 1.2 V, TPS62802 = 1.8 V, TPS62806 = 0.7 V, TPS62807 = 1.2 V, TPS62808 = 1.8 V). In this case, no external resistor is needed which enables a smaller solution size.