SLVSEI1C June   2019  – October 2020 TPS62864 , TPS62866

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C InterfaceTiming Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Save Mode
      2. 8.3.2 Forced PWM Mode
      3. 8.3.3 Start-up
      4. 8.3.4 Switch Current Limit and HICCUP Short-Circuit Protection
      5. 8.3.5 Undervoltage Lockout (UVLO)
      6. 8.3.6 Thermal Warning and Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable (EN)
      2. 8.4.2 Output Discharge
      3. 8.4.3 Start-up Output Voltage and I2C Slave Address Selection (VSET)
      4. 8.4.4 Select Output Voltage Registers (VID)
      5. 8.4.5 Power Good (PG)
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard-, Fast-, and Fast-Mode Plus Protocol
      3. 8.5.3 HS-Mode Protocol
      4. 8.5.4 I2C Update Sequence
      5. 8.5.5 I2C Register Reset
    6. 8.6 Register Map
      1. 8.6.1 Slave Address Byte
      2. 8.6.2 Register Address Byte
      3. 8.6.3 VOUT Register 1
      4. 8.6.4 VOUT Register 2
      5. 8.6.5 CONTROL Register
      6. 8.6.6 STATUS Register
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 6-A Output Current Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Setting The Output Voltage
          3. 9.2.1.2.3 Output Filter Design
          4. 9.2.1.2.4 Inductor Selection
          5. 9.2.1.2.5 Capacitor Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Smaller Application Solution
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Support Resources
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YCG|15
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Start-up Output Voltage and I2C Slave Address Selection (VSET)

During the enable delay (tDelay), the start-up output voltage and device I2C slave address are set by an external resistor connected to the VSET/VID or VSET/ PG pin through an internal R2D (resistor to digital) converter. Table 8-1 shows the options.

Table 8-1 Start-up Output Voltage and I2C Slave Address Options
RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/VID OR VSET/ PG START-UP OUTPUT VOLTAGE (TYP)I2C SLAVE ADDRESS
249 kΩ 1.15 V1000 110
205 kΩ 1.10 V1000 101
162 kΩ 1.05 V1000 100
133 kΩ 1.00 V1000 011
105 kΩ 0.95 V1000 010
86.6 kΩ 0.90 V1000 001
68.1 kΩ 0.85 V1001 000
56.2 kΩ 0.80 V1001 001
44.2 kΩ 0.75 V1001 010
36.5 kΩ 0.70 V1001 011
28.7 kΩ 0.65 V1001 100
23.7 kΩ 0.60 V1001 101
18.7 kΩ 0.55 V1001 110
15.4 kΩ 0.50 V1001 111
12.1 kΩ 0.45 V1000 000
10 kΩ 0.40 V1000 111

The R2D converter has an internal current source which applies current through the external resistor, and an internal ADC which reads back the resulting voltage level. Depending on the level, the correct start-up output voltage and I2C slave address are set. Once this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Ensure that there is no additional current path or capacitance greater than 30 pF from this pin to GND during R2D conversion. Otherwise a false value is set.

During the ramp up period (tRamp), the output voltage ramps to the target value set by VSET first, then ramps up or down to the new value when the value of the output register is changed by I2C interface commands.