SLVSFS6A May 2021 – September 2021 TPS629210-Q1
If the device is configured to VSET operation, the device interprets the VSET pin value following the MODE/S-CONF readout (see Figure 8-3). There is no further interpretation of the VSET pin during operation and the output voltage cannot be changed afterwards without toggling the EN pin.
Figure 8-3 shows the typical schematic for this configuration, where VO is directly sensed at the VOS terminal of the device. VO is sensed only through the VOS pin by an internal resistor divider. The target VO is programmed by an external resitor connected between VSET and GND (see Table 8-2).
|VSET-#||RESISTOR VALUE [Ω](1)||TARGET VO [V]|
|18||249.00 k or larger