SLVSFS6C May   2021  – March 2023 TPS629210-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Thermal Information - DYC Package
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Mode Selection and Device Configuration (MODE/S-CONF Pin)
      2. 8.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 8.3.3 Selectable VO Operation (VSET and Internal Voltage Divider)
      4. 8.3.4 Smart Enable with Precise Threshold
      5. 8.3.5 Power Good (PG)
      6. 8.3.6 Output Discharge Function
      7. 8.3.7 Undervoltage Lockout (UVLO)
      8. 8.3.8 Current Limit and Short Circuit Protection
      9. 8.3.9 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (Auto PFM/PWM)
      3. 8.4.3 AEE (Automatic Efficiency Enhancement)
      4. 8.4.4 100% Duty-Cycle Operation
      5. 8.4.5 Starting into a Prebiased Load
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Programming the Output Voltage
        3. 9.2.2.3 External Component Selection
          1. 9.2.2.3.1 Output Filter and Loop Stability
          2. 9.2.2.3.2 Inductor Selection
          3. 9.2.2.3.3 Capacitor Selection
            1. 9.2.2.3.3.1 Output Capacitor
            2. 9.2.2.3.3.2 Input Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Powering Multiple Loads
      2. 9.3.2 Inverting Buck-Boost (IBB)
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
      3. 9.5.3 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
9.2.2.3.1 Output Filter and Loop Stability

The TPS629210-Q1 is internally compensated to be stable with a range of LC filter combinations. The LC output filters inductance and capacitance have to be considered together, creating a double pole, responsible for the corner frequency of the converter using #GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/GUID-2B51214B-3998-41ED-BC7B-E4AC57F215CA.

Equation 13. fLC= 12πL ×C

#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/LCCOMB_LV can be used to simplify the output filter component selection. The values in #GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/LCCOMB_LV are nominal values, and the effective capacitance was considered to be +20% and –50%. Different values can work, but care has to be taken on the loop stability which is affected. More information on the sizing of the LC filter of a DCS-Control regulator can be found in the Optimizing the TPS62130/40/50/60 Output Filter Application Note.

Table 9-3 Recommended LC Output Filter Combinations
4.7 µF 10 µF 22 µF 47 µF 100 µF 200 µF
1 µH#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/GUID-4F61180C-931F-4D48-BD7B-16FF22167C0A#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/GUID-C5334718-003B-4654-AC94-617D83E79D75 √ √ √ √#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/T4479546-8
1.5 µH √ √ √ √#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/T4479546-8
2.2 µH √ √#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/LCNOTE √ √#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/T4479546-8
3.3 µH √ √ √ √
4.7 µH √ √ √ √#GUID-A608CFA7-0FA1-46F3-8A27-CBE5A5E5C530/T4479546-8
(1) This LC combination is the standard value and recommended for most applications.
(2) Output capacitance must have an ESR of ≥ 10 mΩ for stable operation. See GUID-613EA29B-978D-4AAF-B475-49E465FFFF8A.html#GUID-613EA29B-978D-4AAF-B475-49E465FFFF8A.
(3) Not recommended for 1-MHz operation
(4) At full load, ILpeak can exceed ILIM_HS at higher input or output voltages.

Although the TPS629210-Q1 is stable without the pole and zero being in a particular location, an external feedforward capacitor can also be added to adjust their location based on the specific needs of the application. This can provide better performance in power save mode, improved transient response, or both.

A more detailed discussion on the optimization for stability versus transient response can be found in the Optimizing Transient Response of Internally Compensated DC-DC Converters Application Note and Feedforward Capacitor to Improve Stability and Bandwidth of TPS621/821-Family Application Note.