SLVSFS6A May 2021 – September 2021 TPS629210-Q1
The duty cycle of the buck converter operated in PWM mode is given in Equation 11.
The duty cycle increases as the input voltage comes close to the output voltage and the off time of the high-side switch gets smaller. When the minimum off time of typically 80 ns is reached, the TPS629210-Q1 scales down its switching frequency while it approaches 100% mode. In 100% mode, it keeps the high-side switch on continuously as long as the output voltage is below the internal set point. This allows the conversion of small input to output voltage differences. For example, getting the longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.
The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as: