SLUSEA4D June   2021  – August 2022 TPS62932 , TPS62933 , TPS62933F , TPS62933O , TPS62933P

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Fixed Frequency Peak Current Mode
      2. 9.3.2  Pulse Frequency Modulation
      3. 9.3.3  Voltage Reference
      4. 9.3.4  Output Voltage Setting
      5. 9.3.5  Switching Frequency Selection
      6. 9.3.6  Enable and Adjusting Undervoltage Lockout
      7. 9.3.7  External Soft Start and Prebiased Soft Start
      8. 9.3.8  Power Good
      9. 9.3.9  Minimum On Time, Minimum Off Time, and Frequency Foldback
      10. 9.3.10 Frequency Spread Spectrum
      11. 9.3.11 Overvoltage Protection
      12. 9.3.12 Overcurrent and Undervoltage Protection
      13. 9.3.13 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Modes Overview
      2. 9.4.2 Heavy Load Operation
      3. 9.4.3 Light Load Operation
      4. 9.4.4 Out of Audio Operation
      5. 9.4.5 Forced Continuous Conduction Operation
      6. 9.4.6 Dropout Operation
      7. 9.4.7 Minimum On-Time Operation
      8. 9.4.8 Shutdown Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design With WEBENCH® Tools
        2. 10.2.2.2  Output Voltage Resistors Selection
        3. 10.2.2.3  Choosing Switching Frequency
        4. 10.2.2.4  Soft-Start Capacitor Selection
        5. 10.2.2.5  Bootstrap Capacitor Selection
        6. 10.2.2.6  Undervoltage Lockout Setpoint
        7. 10.2.2.7  Output Inductor Selection
        8. 10.2.2.8  Output Capacitor Selection
        9. 10.2.2.9  Input Capacitor Selection
        10. 10.2.2.10 Feedforward Capacitor CFF Selection
        11. 10.2.2.11 Maximum Ambient Temperature
      3. 10.2.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Minimum On Time, Minimum Off Time, and Frequency Foldback

Minimum on time (tON_MIN) is the smallest duration of time that the high-side switch can be on. tON_MIN is typically 70 ns in the TPS6293x. Minimum off time (tOFF_MIN) is the smallest duration that the high-side switch can be off. tOFF_MIN is typically 140 ns. In CCM operation, tON_MIN, and tOFF_MIN, limit the voltage conversion range without switching frequency foldback.

The minimum duty cycle without frequency foldback allowed is:

Equation 7. GUID-20210219-CA0I-XXN8-CSB5-8N6XX6LVPRCW-low.gif

The maximum duty cycle without frequency foldback allowed is:

Equation 8. GUID-20210219-CA0I-QWS3-DCXC-CMLMW1WHMRL4-low.gif

Given a required output voltage, the maximum VIN without frequency foldback is:

Equation 9. GUID-20210219-CA0I-LR4R-NKX4-X9RQ2QB7HLGW-low.gif

The minimum VIN without frequency foldback is:

Equation 10. GUID-20210219-CA0I-4MRD-XVQ1-JPSP4WL0FSLF-low.gif

In TPS6293x, a frequency foldback scheme is employed once tON_MIN or tOFF_MIN is triggered, which can extend the maximum duty cycle or lower the minimum duty cycle.

The on time decreases while VIN voltage increases. Once the on time decreases to tON_MIN, the switching frequency starts to decrease while VIN continues to go up, which lowers the duty cycle further to keep VOUT in regulation according to Equation 7.

The frequency foldback scheme also works once larger duty cycle is needed under low VIN condition. The frequency decreases once the device hits its tOFF_MIN, which extends the maximum duty cycle according to Equation 8. A wide range of frequency foldback allows the TPS6293x output voltage to stay in regulation with a much lower supply voltage VIN, which allows a lower effective dropout.

With frequency foldback, VIN_MAX is raised, and VIN_MIN is lowered by decreased fSW.

Figure 9-5 Frequency Foldback at tON_MIN,
VOUT = 1.8 V, fSW = 1200 kHz
Figure 9-6 Frequency Foldback at tOFF_MIN,
VOUT = 5 V, fSW = 1200 kHz