SLVS774C June   2007  – January 2016 TPS650240 , TPS650241 , TPS650242 , TPS650243 , TPS650244 , TPS650245

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Control Signals and Supply Pins
    6. 7.6  Electrical Characteristics: VDCDC1 Step-Down Converter
    7. 7.7  Electrical Characteristics: VDCDC2 Step-Down Converter
    8. 7.8  Electrical Characteristics: VDCDC3 Step-Down Converter
    9. 7.9  Electrical Characteristics: General
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Step-Down Converters, VDCDC1, VDCDC2 and VDCDC3
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Save Mode Operation
      2. 8.4.2 Soft-Start
      3. 8.4.3 100% Duty Cycle Low-Dropout Operation
      4. 8.4.4 Low-Dropout Voltage Regulators
      5. 8.4.5 Undervoltage Lockout
      6. 8.4.6 Power-Up Sequencing
      7. 8.4.7 PWRFAIL
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Voltage Selection
      2. 9.1.2 Voltage Change on VDCDC3
      3. 9.1.3 Vdd_alive Output
      4. 9.1.4 LDO1 and LDO2
      5. 9.1.5 VCC Filter
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Configuration for the Samsung Processor S3C6400-533MHz
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection for the DC-DC Converters
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Typical Configuration for the Titan 2 Processor
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 1.6-A, 1.0-A, or 0.8-A, 97% Efficient Step-Down Converter for System Voltage (VDCDC1)
    • 3.3 V or 2.80 V or Adjustable
  • 1.6-A, 1.0-A, or 0.8-A, up to 95% Efficient Step-Down Converter for Memory Voltage (VDCDC2)
    • 1.8 V or 2.5 V or Adjustable
  • 0.8-A, 90% Efficient Step-Down Converter for Processor Core (VDCDC3)
  • Two Selectable Voltages for VDCDC3
    • TPS650240:
      • DEFDCDC3 = LOW: VO = 1.0 V
      • DEFDCDC3 = HIGH: VO = 1.3 V
    • TPS650241:
      • DEFDCDC3 = LOW: VO = 0.9 V
      • DEFDCDC3 = HIGH: VO= 1.375 V
    • TPS650242:
      • DEFDCDC3 = LOW: VO = 1.0 V
      • DEFDCDC3 = HIGH: VO = 1.5 V
    • TPS650243:
      • DEFDCDC3 = LOW: VO = 1.0 V
      • DEFDCDC3 = HIGH: VO = 1.2 V
    • TPS650244:
      • DEFDCDC3 = LOW: VO = 1.55 V
      • DEFDCDC3 = HIGH: VO = 1.6 V
    • TPS650245:
      • DEFDCDC3 = LOW: VO = 0.9 V
      • DEFDCDC3 = HIGH: VO = 1.1 V
  • 30-mA LDO for Vdd_alive
  • 2 × 200-mA General-Purpose LDOs (LDO1 and LDO2)
  • Dynamic Voltage Management for Processor Core
  • LDO1 and LDO2 Voltage Externally Adjustable
  • Separate Enable Pins for Inductive Converters
  • 2.25-MHz Switching Frequency
  • 85-μA Quiescent Current
  • Thermal Shutdown Protection

2 Applications

  • Split-Supply DSP and μP Solutions, ARM-Based Processors, and so on
  • Cellular and Smart Phones
  • GPS
  • Digital Cameras
  • PDA

3 Description

The TPS65024x devices are integrated power management ICs for applications powered by one Li-Ion or Li-Polymer cell, which require multiple power rails. The TPS65024x provide three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O, and memory rails in a processor-based system. All three step-down converters enter a low power mode at light load for maximum efficiency across the widest possible range of load currents. The converters can be forced into fixed-frequency PWM mode by pulling the MODE pin high.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65024x VQFN (32) 5.00 mm × 5.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Functional Block Diagram

TPS650240 TPS650241 TPS650242 TPS650243 TPS650244 TPS650245 fbd_lvs774.gif

4 Revision History

Changes from B Revision (July 2009) to C Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo

Changes from A Revision (December 2007) to B Revision

  • Changed LDO1 output voltage range max value from VinLDO to 3.3VGo
  • Changed LDO2 output voltage range max value from VinLDO to 3.3VGo