SLDS234B December 2017 – September 2018 TPS65218D0
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
PGOOD_BU is a push-pull output indicating if DCDC5 and DCDC6 are in regulation. The output is driven to high when both rails are in regulation, and driven low if at least one of the rails is below the power-good threshold. The output-high level is equal to the output voltage of DCDC6.
PGOOD_BU is the logical AND between PGOOD(DCDC5) and PGOOD(DCDC6), and has no delay time built-in. Unlike main power-good, a fault on DCDC5 or DCDC6 does not trigger the power-down sequencer, does not disable any of the rails in the system, and has no effect on the PGOOD pin. DCDC5 and DCDC6 recover automatically once the fault is removed.
In this example, the power-down is triggered by a fault on DCDC3.
This timing diagram assumes each rail powers up within the strobe delay time. If a rail takes longer than the strobe delay time to power up, the next rail will wait for the previous rail to reach its PGOOD voltage, and then may wait an additional 1ms until it is enabled.