SLVSF96A January   2020  – February 2021 TPS653850A-Q1 , TPS653852A-Q1

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
    1. 3.1 Typical Application Diagram
  4. 4Revision History
  5. 5Device and Documentation Support
    1. 5.1 Documentation Support
      1. 5.1.1 Related Documentation
    2. 5.2 Receiving Notification of Documentation Updates
    3. 5.3 Support Resources
    4. 5.4 Trademarks
    5. 5.5 Electrostatic Discharge Caution
    6. 5.6 Glossary
  6. 6Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TPS653850A-Q1 and TPS653852A-Q1 device is a multirail power supply designed to supply microcontrollers in safety relevant applications, such as those found in the automotive industry. The device supports functional safety microcontrollers with dual-core lockstep (LS) and other multi-core architectures.

The TPS653850A-Q1 and TPS653852A-Q1 device integrates multiple supply rails to power the MCU, CAN or FlexRay, and external sensors. A buck-boost converter with internal FETs converts the input battery voltage between 2.3 V and 36 V to a 6-V preregulator output that supplies the other regulators. An integrated charge pump provides an overdrive voltage for the internal regulators, and can also be used to drive an external NMOS FET as reverse battery protection. The device supports wake-up from an ignition signal (IGN pin) or wake-up from a CAN transceiver or other signal (CAN_WU pin).

An independent voltage monitoring unit inside the device monitors undervoltage and overvoltage on all internal supply rails and regulator outputs of the battery supply. Regulator current limits and temperature protections are also implemented. The TPS653850A-Q1 and TPS653852A-Q1 device features a question-answer watchdog, MCU error-signal monitor, clock monitoring on internal oscillator, self-check on clock monitor, cyclic redundancy check (CRC) on non-volatile memory and SPI communication, a diagnostic output pin allowing MCU to observe device internal analog and digital signals, a reset circuit for the MCU (NRES pin) and a safing output (ENDRV pin) to disable external power-stages on any detected system-failure. The device automatically runs a built-in self-test (BIST) at start up and the MCU may re-run the BIST during system run time through software control if needed. A dedicated DIAGNOSTIC state allows the MCU to check TPS653850A-Q1 and TPS653852A-Q1 functionality.

The TPS653850A-Q1 and TPS653852A-Q1 device also has an error reporting capability through the SPI register. The device has separate status bits in the SPI register for each specific error on the system level or device level. When the device detects a particular error condition, it sets the appropriate status bit and keeps this status bit set until the MCU reads-out the SPI register in which this status bit was set. Based on which status bit was set, the MCU can decide whether it must keep the system in a safe state or whether it can resume with the operation of the system.

The TPS653850A-Q1 and TPS653852A-Q1 device is available in a 48-pin HTSSOP PowerPAD™ IC package.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE
TPS653850A-Q1 HTSSOP (48) 12.50 mm × 6.10 mm
TPS653852A-Q1
For more information, see Section 6.