SLVSE46A November 2017 – January 2018 TPS65680
The VSS output is a switched Gate-Driver Low-Side Supply and supports High and Low state only.
At power-up, the VSS output is in HiZ state and remains in this state until VGH, VGL1 and VGL2 are powered up. Then the output is released to the programmed output state as defined in register and remains in this state until the sequencer takes control after the programmable EN_DLY timer in register expired. During panel discharge, the output can be configured to be in Low or High state, separately for DISCHARGE STEP1 and DISCHARGE STEP2 using the respective bits of the and registers.