SLVSE46A November 2017 – January 2018 TPS65680
This instruction advances the sequencer to <JUMP ADDRESS>. It is most commonly used in conjunction with an EEQ instruction to implement conditional execution of a section of code. Addressing is absolute, i.e. <JUMP ADDRESS> denotes a specific location inside the pattern memory that is independent of the position of the JMP instruction itself. Jumps can be performed in either direction and multiple JMP commands can be executed back-to-back. A JMP instruction must not reflect on itself, i.e. <JUMP ADDRESS> must be different from the address of the issuing JMP instruction itself. Also, a LOP command must not be followed directly by a JMP instruction. See Loop Instruction (LOP) for details. If the Jump address exceeds the maximum allowed logical address of 53, the pattern sequence terminates immediately, similarly to executing an END instruction.
Processing a JMP instruction requires two clock cycles. Within the sequence, the level shifter output state preceding the JMP instruction is extended by two clock cycles while processing the JMP instruction as shown in the example below.
ADDR INST CLK OUTPUT STATE 1 CXE<1> 1 <1> 2 CXE<2> 2 <2> 3 JMP(5) 3 <2> <-- Jump to ADDR 5 4 <2> 4 CXE<3> <-- Line is skipped by JMP instruction 5 CXE<4> 5 <4>