SLVSE46A November 2017 – January 2018 TPS65680
Figure 26 shows the format of a single write to a defined register address. First, the master issues a start condition, followed by a seven-bit I2C address. Next, the master writes a zero to signify that it wishes to conduct a write operation. Upon receiving an acknowledge from the slave, the master sends the eight-bit register address across the bus. Following a second acknowledge, TPS65680 sets the I2C register address to the defined value and the master writes the eight-bit data value. Upon receiving a third acknowledge, TPS65680 auto increments the I2C register address by one and the master issues a stop condition. This action concludes the register write.