SWCS095L August   2013  – February 2019 TPS659038-Q1 , TPS659039-Q1

PRODUCTION DATA.  

  1. 1 Device Summary
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Simplified Block Diagram
  2. 2 Revision History
  3. 3 Device Comparison
  4. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions
      1.      Pin Functions
    2. 4.2 Device Ball Mapping – 13 × 13 nFBGA, 169 Balls, 0,8-mm Pitch
    3. 4.3 Signal Descriptions
  5. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics: Latch Up Rating
    6. 5.6  Electrical Characteristics: LDO Regulator
    7. 5.7  Electrical Characteristics: Dual-Phase (SMPS12 and SMPS45) and Triple-Phase (SMPS123 and SMPS457) Regulators
    8. 5.8  Electrical Characteristics: Stand-Alone Regulators (SMPS3, SMPS6, SMPS7, SMPS8, and SMPS9)
    9. 5.9  Electrical Characteristics: Reference Generator (Bandgap)
    10. 5.10 Electrical Characteristics: 16-MHz Crystal Oscillator, 32-kHz RC Oscillator, and Output Buffers
    11. 5.11 Electrical Characteristics: DC-DC Clock Sync
    12. 5.12 Electrical Characteristics: 12-Bit Sigma-Delta ADC
    13. 5.13 Electrical Characteristics: Thermal Monitoring and Shutdown
    14. 5.14 Electrical Characteristics: System Control Thresholds
    15. 5.15 Electrical Characteristics: Current Consumption
    16. 5.16 Electrical Characteristics: Digital Input Signal Parameters
    17. 5.17 Electrical Characteristics: Digital Output Signal Parameters
    18. 5.18 Electrical Characteristics: I/O Pullup and Pulldown Resistance
    19. 5.19 I2C Interface Timing Requirements
    20. 5.20 SPI Timing Requirements
    21. 5.21 Typical Characteristics
  6. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1  Power Management
      2. 6.3.2  Power Resources (Step-Down and Step-Up SMPS Regulators, LDOs)
        1. 6.3.2.1 Step-Down Regulators
          1. 6.3.2.1.1 Sync Clock Functionality
          2. 6.3.2.1.2 Output Voltage and Mode Selection
          3. 6.3.2.1.3 Current Monitoring and Short Circuit Detection
          4. 6.3.2.1.4 POWERGOOD
          5. 6.3.2.1.5 DVS-Capable Regulators
          6. 6.3.2.1.6 Non DVS-Capable Regulators
          7. 6.3.2.1.7 Step-Down Converters SMPS12 and SMPS123
            1.         a. Dual-Phase SMPS and Stand-Alone SMPS
            2.         b. Triple Phase SMPS
          8. 6.3.2.1.8 Step-Down Converter SMPS45 and SMPS457
          9. 6.3.2.1.9 Step-Down Converters SMPS3, SMPS6, SMPS7, SMPS8, and SMPS9
        2. 6.3.2.2 LDOs – Low Dropout Regulators
          1. 6.3.2.2.1 LDOVANA
          2. 6.3.2.2.2 LDOVRTC
          3. 6.3.2.2.3 LDO Bypass (LDO9)
          4. 6.3.2.2.4 LDOUSB
          5. 6.3.2.2.5 Other LDOs
      3. 6.3.3  Long-Press Key Detection
      4. 6.3.4  RTC
        1. 6.3.4.1 General Description
        2. 6.3.4.2 Time Calendar Registers
          1. 6.3.4.2.1 TC Registers Read Access
          2. 6.3.4.2.2 TC Registers Write Access
        3. 6.3.4.3 RTC Alarm
        4. 6.3.4.4 RTC Interrupts
        5. 6.3.4.5 RTC 32-kHz Oscillator Drift Compensation
      5. 6.3.5  GPADC – 12-Bit Sigma-Delta ADC
        1. 6.3.5.1 Asynchronous Conversion Request (SW)
        2. 6.3.5.2 Periodic Conversion Request (AUTO)
        3. 6.3.5.3 Calibration
      6. 6.3.6  General-Purpose I/Os (GPIO Terminals)
        1. 6.3.6.1 REGEN Output
      7. 6.3.7  Thermal Monitoring
        1. 6.3.7.1 Hot-Die Function (HD)
        2. 6.3.7.2 Thermal Shutdown (TS)
        3. 6.3.7.3 Temperature Monitoring With External NTC Resistor or Diode
      8. 6.3.8  Interrupts
      9. 6.3.9  Control Interfaces
        1. 6.3.9.1 I2C Interfaces
          1. 6.3.9.1.1 I2C Implementation
          2. 6.3.9.1.2 F/S Mode Protocol
          3. 6.3.9.1.3 HS Mode Protocol
        2. 6.3.9.2 SPI Interface
          1. 6.3.9.2.1 SPI Modes
          2. 6.3.9.2.2 SPI Protocol
      10. 6.3.10 Device Identification
    4. 6.4 Device Functional Modes
      1. 6.4.1  Embedded Power Controller
      2. 6.4.2  State Transition Requests
        1. 6.4.2.1 ON Requests
        2. 6.4.2.2 OFF Requests
        3. 6.4.2.3 SLEEP and WAKE Requests
      3. 6.4.3  Power Sequences
      4. 6.4.4  Start Up Timing and RESET_OUT Generation
      5. 6.4.5  Power On Acknowledge
        1. 6.4.5.1 POWERHOLD Mode
        2. 6.4.5.2 AUTODEVON Mode
      6. 6.4.6  BOOT Configuration
        1. 6.4.6.1 Boot Terminal Selection
      7. 6.4.7  Reset Levels
      8. 6.4.8  Warm Reset
      9. 6.4.9  RESET_IN
      10. 6.4.10 Watchdog Timer (WDT)
      11. 6.4.11 System Voltage Monitoring
        1. 6.4.11.1 Generating a POR
  7. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Recommended External Components
        2. 7.2.2.2  SMPS Input Capacitors
        3. 7.2.2.3  SMPS Output Capacitors
        4. 7.2.2.4  SMPS Inductors
        5. 7.2.2.5  LDO Input Capacitors
        6. 7.2.2.6  LDO Output Capacitors
        7. 7.2.2.7  VCC1
          1. 7.2.2.7.1 Meeting the Power Down Sequence
          2. 7.2.2.7.2 Maintaining Sufficient Input Voltage
        8. 7.2.2.8  VIO_IN
        9. 7.2.2.9  16-MHz Crystal
        10. 7.2.2.10 GPADC
      3. 7.2.3 Application Curves
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Related Links
    4. 10.4 Receiving Notification of Documentation Updates
    5. 10.5 Community Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Package Materials Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ZWS|169
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4.1 Pin Functions

Pin Functions

PIN I/O FUNCTION AVAILABILITY DESCRIPTION CONNECTION
IF NOT USED OR NOT AVAILABLE		 PU/PD(3)
NAME NO.
'38(1) '39(1)
REFERENCE
REFGND1 A4 — √ √ System reference ground Ground —
VBG B7 O √ √ Bandgap reference voltage N/A —
STEP-DOWN CONVERTERS (SMPSs)
SMPS1_GND D10 — √ √ Power ground connection for SMPS1 Ground —
E9
E10
SMPS1_IN D11 I √ √ Power input for SMPS1 System supply —
D12
D13
SMPS1_SW E11 O √ √ Switch node of SMPS1; connect output inductor Floating —
E12
E13
SMPS2_GND F9 — √ √ Power ground connection for SMPS2 Ground —
F10
G10
SMPS2_IN G11 I √ √ Power input for SMPS2 System supply —
G12
G13
SMPS2_SW F11 O √ √ Switch node of SMPS2; connect output inductor Floating —
F12
F13
SMPS1_2_FDBK B13 I √ √ Output voltage-sense (feedback) input for SMPS1 and SMPS2 Ground —
SMPS1_2_FDBK_GND C12 I √ √ Ground-sense (feedback) input for SMPS1 and SMPS2 Ground —
SMPS3_GND H10 — √ √ Power ground connection for SMPS3 Ground —
J9
J10
SMPS3_IN H11 I √ √ Power input for SMPS3 System supply —
H12
H13
SMPS3_SW J11 O √ √ Switch node of SMPS3; connect output inductor Floating —
J12
J13
SMPS3_FDBK K13 I √ √ Output voltage-sense (feedback) input for SMPS3 Floating —
SMPS4_GND F4 — √ √ Power ground connection for SMPS4 Ground —
G4
G5
SMPS4_IN F1 I √ √ Power input for SMPS4 System supply —
F2
F3
SMPS4_SW G1 O √ √ Switch node of SMPS4; connect output inductor Floating —
G2
G3
SMPS4_5_FDBK K2 I √ √ Output voltage-sense (feedback) input for SMPS4 and SMPS5 Ground —
SMPS4_5_FDBK_GND K3 I √ √ Ground-sense (feedback) input for SMPS4 and SMPS5 Ground —
SMPS5_GND H4 — √ √ Power ground connection for SMPS5 Ground —
H5
J4
SMPS5_IN J1 I √ √ Power input for SMPS5 System supply —
J2
J3
SMPS5_SW H1 O √ √ Switch node of SMPS5; connect output inductor Floating —
H2
H3
SMPS6_GND L5 — √ √ Power ground connection for SMPS6 Ground —
L6
SMPS6_IN M6 I √ √ Power input for SMPS6 System supply —
N6
SMPS6_SW M5 O √ √ Switch node of SMPS6 connect output inductor Floating —
N5
SMPS6_FDBK K6 I √ √ Output voltage sense (feedback) input for SMPS6 Ground —
SMPS7_GND D4 — √ √ Power ground connection for SMPS7 Ground —
D5
E4
SMPS7_IN E1 I √ √ Power input for SMPS7 System supply —
E2
E3
SMPS7_SW D1 O √ √ Switch node of SMPS7; connect output inductor Floating —
D2
D3
SMPS7_FDBK B1 I √ √ Output voltage-sense (feedback) input for SMPS7 Floating —
SMPS8_GND L9 — √ √ Power ground connection for SMPS8 Ground —
L10
SMPS8_IN M9 I √ √ Power input for SMPS8 System supply —
N9
SMPS8_SW M10 O √ √ Switch node of SMPS8 connect output inductor Floating —
N10
SMPS8_FDBK L11 I √ √ Output voltage-sense (feedback) input for SMPS8 Ground —
SMPS9_GND L7 — √ √ Power ground connection for SMPS9 Ground —
L8
SMPS9_IN M8 I √ √ Power input for SMPS9 System supply —
N8
SMPS9_SW M7 O √ √ Switch node of SMPS9 connect output inductor Floating —
N7
SMPS9_FDBK J8 I √ √ Output voltage-sense (feedback) input for SMPS9 Ground —
LOW DROPOUT REGULATORS
LDO1_OUT C6 O √ √ LDO1 output voltage Floating —
LDO12_IN A6 I √ √ Power input voltage for LDO1 and LDO2 regulators System supply —
LDO2_OUT B6 O √ √ LDO2 output voltage Floating —
LDO3_OUT K11 O √ √ LDO3 output voltage Floating —
LDO34_IN L12 I √ √ Power input voltage for LDO3 and LDO4 regulators System supply —
L13
LDO4_OUT K12 O √ LDO4 output voltage Floating —
LDO5_OUT K4 O √ LDO5 output voltage Floating —
LDO58_IN M4 I √ Power input voltage for LDO5 and LDO8 regulators System supply —
N4
LDO6_IN N3 I √ Power input voltage for LDO6 regulator System supply —
LDO6_OUT L4 O √ LDO6 output voltage Floating —
LDO7_LDOUSB_IN A10 I √ √ Power input voltage for LDO7 and LDOUSB (LDOUSB_IN1) regulators System supply —
LDO7_OUT C9 O √ LDO7 output voltage Floating —
LDO8_OUT K5 O √ LDO8 output voltage Floating —
LDO9_IN C4 I √ √ Power input voltage for LDO9 regulator System supply —
LDO9_OUT A5 O √ √ LDO9 output voltage Floating —
LDOUSB_IN2 A9 I √ √ Power input voltage 2 for LDOUSB regulator System supply —
LDOUSB_OUT B9 O √ √ LDOUSB output voltage Floating —
LOW NOISE DROPOUT REGULATORS
LDOLN_IN C5 I √ √ Power input voltage for LDOLN regulator System supply —
LDOLN_OUT B5 O √ √ LDOLN output voltage Floating —
LOW-DROPOUT REGULATORS (INTERNAL)
LDOVANA_OUT C8 O √ √ LDOVANA output voltage N/A —
LDOVRTC_OUT A8 O √ √ LDOVRTC output voltage. For silicon revisions 1.3 or earlier, rapid power off and on requires a pulldown resistor on the LDOVRTC_OUT pin. See Section 6.4.11 for more details. N/A —
SIGMA-DELTA GPADC
GPADC_IN0 B2 I √ √ GPADC input 0 Ground —
GPADC_IN1 C2 I √ √ GPADC input 1 Ground —
GPADC_IN2 C3 I √ √ GPADC input 2 Ground —
GPADC_VREF B4 O √ √ GPADC output reference voltage Floating —
CLOCKING
CLK32KGO M11 O √ √ 32-kHz digital-gated output clock available when VIO_IN input supply is present Floating —
OSC16MCAP C1 O √ √ Filtering capacitor for the 16-MHz crystal oscillator Floating —
OSC16MIN A3 I √ √ 16-MHz crystal oscillator input or digital clock input Floating or Ground in Bypass Mode —
OSC16MOUT A2 O √ √ 16-MHz crystal oscillator output or floating in case of digital clock Floating —
SYNCDCDC B8 I √ √ Sync pin to sync DC-DCs with external clock Ground -
SYSTEM CONTROL
BOOT0 L3 I √ √ Boot ball 0 for power-up sequence selection Ground or VRTC —
BOOT1 K7 I √ √ Boot ball 1 for power-up sequence selection Ground or VRTC —
ENABLE1 J5 I √ √ Peripheral power request input 1 Floating PPU
PPD(2)
GPIO_0 B12 I/O √ √ General-purpose input(2) or output Ground or VSYS (VCC1) PPD
GPIO_1 C13 I/O √ √ Primary function: General-purpose input(2) or output Floating PPU
PPD
O √ √ Secondary function: VBUSDET - VBUS detection Floating —
GPIO_2 A12 I/O √ √ General-purpose input(2) or output Floating PPU
PPD
O √ √ Secondary function: REGEN2 — External regulator enable output 2 Floating —
GPIO_3 H9 I √ √ General-purpose input(2) or output Ground PPD
GPIO_4 K10 I/O √ √ Primary function: General-purpose input(2) or output Floating PPU
PPD(2)
O √ √ Secondary function: SYSEN1 — External system enable Floating —
GPIO_5 C10 I/O √ √ Primary function: General-purpose input(2) or output Ground PPU
PPD(2)
O √ √ Secondary function: CLK32KGO1V8 — 32-kHz digital-gated output clock available when VRTC is present Floating —
GPIO_6 N11 I/O √ √ Primary function: General-purpose input(2) or output Floating PPU
PPD(2)
O √ √ Secondary function: SYSEN2 — External system enable Floating —
GPIO_7 G9 I/O √ √ Primary function: General-purpose input(2) or output Ground or VRTC PPD
I √ √ Secondary function: POWERHOLD input Ground or VRTC PPD(2)
I2C1_SCL_SCK L1 I/O √ √ Control I2C serial clock (external pullup) and SPI clock signal Floating —
I2C1_SDA_SDI L2 I/O √ √ Control I2C serial bidirectional data (external pullup) and SPI data signal Floating —
I2C2_SDA_SDO H8 I/O √ √ DVS I2C serial bidirectional data (external pullup) and SPI data read signal or I2C serial bidirectional data (external pullup) Floating —
I2C2_SCL_SCE M3 I/O √ √ DVS I2C serial clock (external pullup) and SPI enable signal or I2C serial clock (external pullup) Floating —
INT K1 O √ √ Maskable interrupt output request to the host processor N/A —
NRESWARM E6 I √ √ Warm reset input Floating PPU(2)
NSLEEP E5 I √ √ NSLEEP request signal Floating PPU(2)
PPD
RPWRON C11 I √ √ External remote switch-on event Floating PU
PWRDOWN K8 I √ √ Power-down signal Floating PPD
PWRON G8 I √ √ External power-on event (on-button switch-on event) Floating PU
REGEN1 F8 O √ √ External regulator enable output 1 Floating —
RESET_IN K9 I √ √ Reset input Floating PPD
RESET_OUT G6 O √ √ System reset/power on output (Low—Reset, High—Active or Sleep) Floating —
POWER DETECTION
POWERGOOD J7 O √ √ Indication signal for valid regulator output voltages Floating —
VBUS D8 I √ √ VBUS Detection Voltage Ground —
VCC_SENSE B3 I √ √ System supply sense line System supply —
VCC_SENSE2 A11 I √ √ System supply sense line System supply —
PROGRAMMING, TESTING
VPROG N12 I √ √ Primary function: OTP programming voltage Ground or Floating —
O √ √ Secondary function: TESTV Floating —
POWER SUPPLIES
GND_ANA A7 — √ √ Analog power ground Ground —
E7
F5
M13
GND_DIG M12 — √ √ Digital power ground Ground —
PBKG A1 — √ √ Substrate ground Ground —
A13
B10
B11
D6
D7
E8
F6
F7
G7
H6
H7
J6
M1
M2
N1
N13
VCC1 C7 I √ √ Analog input voltage supply System supply —
VIO_GND N2 — √ √ Digital ground connection Ground —
VIO_IN D9 I √ √ Digital supply input for GPIOs and I/O supply voltage System supply —
(1) '38 designates the TPS659038-Q1 and '39 designates TPS659039-Q1
(2) Default option
(3) The PU/PD column shows the pullup and pulldown resistors on the digital input lines. Pullup and pulldown resistors:
    PUpullup
    PDpulldown
    PPUsoftware-programmable pullup
    PPDsoftware-programmable pulldown