This section applies to silicon revisions 1.3 or earlier. Newer silicon revisions do not have this requirement because the VCC is continuously sampled. See Section 6.3.10 to identify the silicon version in the device.
To generate a POR from a falling VCC, VCC is sampled every 1 ms and compared to the POR threshold. In case VCC is discharged and resupplied quickly, a POR may not be reliably generated if VCC crosses the POR threshold between samples. Another way to generate POR is to discharge the LDOVRTC regulator to 0 V after VCC is removed. With no external load, this could take seconds for the LDOVRTC output to discharge to 0 V. The PMIC should not be restarted after VCC is removed but before LDOVRTC is discharged to 0 V. If necessary, TI recommends adding a pulldown resistor from the LDOVRTC output to GND with a minimum of 3.9 kΩ to speed up the LDOVRTC discharge time. For more details, refer to POR Generation in TPS65903x and TPS6591x Devices.
The value of the pulldown resistor should be chosen based on the desired discharge time and acceptable current draw in the OFF state, but no greater than 0.5 mA. Use Equation 7 to calculate the pulldown resistor based on the desired discharge time.
Because LDOVRTC is always on when VCC is supplied, additional current is drawn through the pulldown resistor. The output current of LDOVRTC while the PMIC is in OFF state should not exceed 0.5 mA. Use Equation 8 to calculate the pulldown current.