220.127.116.11 Step-Down Regulators
The synchronous step-down converter used in the power-management core has high efficiency while enabling operation with small and cost-competitive external components. The SMPSx_IN supply terminals of all the converters can be individually connected to the VSYS supply (VCC1 terminal). Four of these configurable step-down converters are multi-phased to create up to 4-A and 6-A rails, while another converter can be combined to these 2 rails to create 2 rails up to 9 A and 6A of output current. All of the step-down converters can synchronize to an external clock source between 1.7 Mhz and 2.7 MHz, or an internal fall back clock at 2.2 MHz.
The step-down converter supports two operating modes, which can be selected independently:
Forced PWM mode: In forced PWM mode, the device avoids pulse skipping and allows easy filtering of the switch noise by external filter components. The drawback is the higher IDDQ at low output current levels.
ECO-mode (lowest quiescent current mode): Each step-down converter can be individually controlled to enter a low quiescent current mode. In ECO-mode, the quiescent current is reduced and the output voltage is supervised by a comparator while most parts of the control are disabled to save power. The regulators should not be enabled under ECO-mode in order to ensure the stability of the output. ECO-mode should be enabled only when a converter has less than 5 mA of load current and VO can remain constant. In addition, ECO-mode should be disabled before a load transient step to let the converter respond in a timely manner to the excess current draw. To ensure proper operation of the converter while it is in ECO-mode, the output voltage level must be less then 70% of the input supply voltage level. If the VO of the converter is greater than 2.8V, a safety feature of the device will monitor the supply voltage of the converter, and automatically shut down the converter if the input voltage falls below 4V. The purpose of this safety mechanism is to prevent damage to the converter due to design limitation while the converter is in ECO mode.
In addition to the operating modes, the following parameters can be selected for the regulators:
Powergood: The POWERGOOD signal high indicates that all SMPS outputs are within 10% (typical case) of the programmed value. The individual power good signal of a switching regulator is blanked when the regulator is disabled or when the regulator voltage transitions from one set point to another.
Output discharge: Each switching regulator is equipped with an output discharge enable bit. When this bit is set to 1, the output of the regulator is discharged to ground with the equivalent of a 9-Ω resistor when the regulator is disabled. If the regulator enable bit is set, the discharge bit of the regulator is ignored.
Output current monitoring: GPADC can monitor the SMPS output current. One SMPS at a time can be selected for measurement from the following: SMPS12, SMPS3, SMPS123, SMPS45, SMPS457, SMPS6 and SMPS7. Selection is controlled through the GPADC_SMPS _ILMONITOR_EN register.
Step-down converter ENABLE: The step-down converter enable and disable is part of the flexible power-up and power-down state-machine. Each converter can be programmed so that it is powered up automatically to a preselected voltage in one of the time slots after a power-on condition occurs. Alternatively, each SMPS can be controlled by a dedicated terminal. Terminals NSLEEP and ENABLE1 can be mapped to any resource (LDOs, SMPS converter, 32-kHz clock output or GPIO) to enable or disable it. Each SMPS can also be enabled and disabled through I2C register access.