SLVSCO4D July 2015 – February 2019 TPS65917-Q1
Figure 5-4 shows the timing diagram of the TPS65917-Q1 after the first supply detection.
The time t1 is the delay from VCC crossing the POR threshold to VIO rising up. The time t1 must be at least 6 ms. If the time from VCC to VIO is less than 6 ms, the VIO buffers will be supplied while the OTP is still being initialized, which could cause glitches on any VIO output buffer. Supplying VIO at least 6 ms after supplying VCC ensures that the OTP is initialized and output buffers are held low when VIO is supplied.
The time t2 is the delay between the start of the power-up sequence and the RESET_OUT release. The RESET_OUT resource is released when the power-up sequence is complete. The duration of the power-up sequence depends on OTP programming.