SLVS338R May   2001  – April 2015 TPS715

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Wide Supply Range
      2. 7.3.2 Low Supply Current
      3. 7.3.3 Stable With Any Capacitor ≥ 0.47 µF
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Reverse Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power the MSP430 Microcontroller
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitor Requirements
        2. 8.2.2.2 Dropout Voltage (VDO)
        3. 8.2.2.3 Setting VOUT for the TPS71501 Adjustable LDO
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

Over operating temperature range (unless otherwise noted).(1)(2)
MIN MAX UNIT
Voltage VIN –0.3 24 V
VOUT –0.3 16.5
Peak output current Internally limited
Temperature Junction, TJ –40 150 °C
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input supply voltage 2.5 24 V
IOUT Output current 0 50 mA
CIN Input capacitor 0 0.047 µF
COUT Output capacitor 0.47 1 µF

6.4 Thermal Information

THERMAL METRIC(1) TPS715 UNIT
DCK [SC70]
5 PINS
RθJA Junction-to-ambient thermal resistance 253.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 73.7
RθJB Junction-to-board thermal resistance 84.6
ψJT Junction-to-top characterization parameter 1.1
ψJB Junction-to-board characterization parameter 83.9
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Over operating junction temperature range (TJ = –40°C to 125°C), VIN = VOUT(nom) + 1 V, IOUT = 1 mA, and COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage(1) IO = 10 mA 2.5 24 V
IO = 50 mA 3 24
VOUT Output voltage (TPS71501) 1.2 15 V
VOUT Accuracy(1) Over VIN, IOUT, and T VOUT + 1 V ≤ VIN ≤ 24 V –4% 4%
100 μA ≤ IOUT ≤ 50 mA
IGND Ground pin current(2) 0 ≤ IOUT ≤ 50 mA, TJ = –40°C to 85°C 3.2 4.2 μA
0 mA ≤ IOUT ≤ 50 mA 3.2 4.8
0 mA ≤ IOUT ≤ 50 mA, VIN = 24 V 5.8
ΔVOUT(ΔIOUT) Load regulation IOUT = 100 μA to 50 mA 22 mV
ΔVOUT(ΔVIN) Output voltage line regulation (1) VOUT + 1 V < VIN ≤ 24 V 20 60 mV
Vn Output noise voltage BW = 200 Hz to 100 kHz, COUT = 10 μF,
IOUT = 50 mA
575 μVrms
ICL Output current limit VOUT = 0 V, VIN ≥ 3.5 V 125 750 mA
VOUT = 0 V, VIN < 3.5 V 90 750 mA
PSRR Power-supply ripple rejection f = 100 kHz, COUT = 10 μF 60 dB
VDO Dropout voltage
VIN = VOUT(nom) – 0.1 V
IOUT = 50 mA 415 750 mV
(1) Minimum VIN = VOUT + VDO or the value shown for Input voltage in this table, whichever is greater.
(2) See Figure 10. The TPS715 family employs a leakage null control circuit. This circuit is active only if output current is less than pass FET leakage current. The circuit is typically active when output load is less than 5 μA, VIN is greater than 18 V, and die temperature is greater than 100°C.

6.6 Typical Characteristics

TPS715 tc_vo_io-lvs338.gif
Figure 1. Output Voltage vs Output Current
TPS715 tc_qc_ta-lvs338.gif
Figure 3. Quiescent Current vs Junction Temperature
TPS715 tc_zo_f-lvs338.gif
Figure 5. Output Impendence vs Frequency
TPS715 tc_vdo_vi-lvs338.gif
Figure 7. TPS71501 Dropout Voltage vs Input Voltage
TPS715 tc_pssr_f-lvs338.gif
Figure 9. Power Supply Ripple Rejection vs Frequency
TPS715 tc_vo_ta-lvs338.gif
Figure 2. Output Voltage vs Junction Temperature
TPS715 tc_osnd_f-lvs338.gif
Figure 4. Output Spectral Noise Density vs Frequency
TPS715 tc_vdo_io-lvs338.gif
Figure 6. Dropout Voltage vs Output Current
TPS715 tc_vdo_ta-lvs338.gif
Figure 8. Dropout Voltage vs Junction Temperature