SLVSBM4C September   2012  – January 2016 TPS717-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Startup and Noise Reduction Capacitor
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Minimum Load
      6. 7.3.6 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Transient Response
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Power Dissipation
      5. 8.1.5 Output Noise
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 Powering a PLL Integrated on an SOC
        3. 8.2.2.3 Design Considerations
      3. 8.2.3 Application Curve
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device HBM ESD Classification Level C4B
  • Input Voltage: 2.5 V to 6.5 V
  • Available in Multiple Output Versions:
    • Fixed Output with Voltages from 0.9 V to 5 V
    • Adjustable Output Voltage from 0.9 V to 6.2 V
  • Ultra-High PSRR:
    • 70 dB at 1 kHz, 67 dB at 100 kHz, and 45 dB at 1 MHz
  • Excellent Load and Line Transient Response
  • Very Low Dropout: 170 mV typical at 150 mA
  • Low Noise: 30 μVRMS typical (100 Hz to 100 kHz)
  • Small 5-pin SOT, 2-mm × 2-mm WSON-6, and 1.5-mm × 1.5-mm WSON-6 Packages

2 Applications

  • PLLs
  • VCOs
  • Camera Sensor Power
  • Microcontroller Power
  • Wireless LAN, Bluetooth®
  • ADAS and Infotainment Systems

3 Description

The TPS717-Q1 family of low-dropout (LDO), low-power linear regulators offers very high power-supply rejection (PSRR) and maintains very low 45-μA ground current in an ultra-small, five-pin SOT package. The family uses an advanced BiCMOS process and a PMOSFET pass device to achieve fast start-up, very low noise, excellent transient response, and excellent PSRR performance. The TPS717-Q1 is stable with a 1-μF ceramic output capacitor and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations. The device family is fully specified from TJ, TA = –40°C to 125°C and is offered in a small SOT (SC70-5) package, a
2-mm × 2-mm WSON-6 package with a thermal pad, and a 1.5-mm × 1.5-mm WSON-6 package, which are ideal for small form-factor portable equipment (such as wireless handsets and PDAs). The TPS717-Q1 family of LDOs is qualified for AEC-Q100 grade 1.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS717-Q1 SOT (5) 2.00 mm × 1.25 mm
WSON (6) 2.00 mm × 2.00 mm
WSON (6) 1.50 mm × 1.50 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Typical Application Circuit for Fixed-Voltage Versions

TPS717-Q1 front_fbd_sbvsbm4.gif

PSRR vs Frequency

TPS717-Q1 front_tc_sbvs068.gif