SLVSAJ4D
September 2010 – March 2026
TPS723-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Power Dissipation Ratings (legacy chip)
5.5
Thermal Information (new chip)
5.6
Electrical Characteristics
6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Enable
7.3.2
Current Limit
7.3.3
Dropout Voltage
7.3.4
Output Pullup
7.3.5
Thermal Shutdown
7.3.6
Undervoltage Lockout (UVLO)
7.3.7
NR and Programmable Soft-Start
7.4
Device Functional Modes
7.4.1
Device Functional Mode Comparison
7.4.2
Normal Operation
7.4.3
Dropout Operation
7.4.4
Disabled
8
Application and Implementation
8.1
Application Information
8.1.1
Adjustable Device Feedback Resistor Selection
8.1.2
Recommended Capacitor Types
8.1.3
Input and Output Capacitor Selection
8.1.4
Reverse Current
8.1.5
Feed-Forward Capacitor (CFF)
8.1.6
Power Dissipation (PD)
8.1.7
Estimating Junction Temperature
8.2
Typical Application
8.2.1
Output Noise
8.2.2
Design Requirements
8.2.3
Power-Supply Rejection
8.2.4
Application Curves
8.3
Best Design Practices
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.1.1.1
Spice Models
9.1.2
Device Nomenclature
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsaj4d_oa
slvsaj4d_pm