SBVS034N September   2003  – December 2015 TPS731

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Output Noise
      2. 7.3.2 Internal Current Limit
      3. 7.3.3 Enable Pin and Shutdown
      4. 7.3.4 Reverse Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation With 1.7 V ≤ VIN ≤ 5.5 V and VEN ≥ 1.7 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Dropout Voltage
        3. 8.2.2.3 Transient Response
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS731xx belongs to a family of new generation LDO regulators that use an NMOS pass transistor to achieve ultra-low-dropout performance, reverse current blockage, and freedom from output capacitor constraints. These features, combined with low noise and an enable input, make the TPS731xx ideal for portable applications. This regulator family offers a wide selection of fixed output voltage versions and an adjustable output version. All versions have thermal and over-current protection, including foldback current limit.

8.2 Typical Applications

Figure 31 shows the basic circuit connections for the fixed-voltage models. Figure 32 gives the connections for the adjustable output version (TPS73101).

TPS731 ta_cir_fxd_v_bvs034.gif Figure 31. Typical Application Circuit for Fixed-Voltage Versions
TPS731 ta_cir_adj_bvs034.gif Figure 32. Typical Application Circuit for Adjustable-Voltage Version

8.2.1 Design Requirements

R1 and R2 can be calculated for any output voltage using the formula shown in Figure 32. Sample resistor values for common output voltages are shown in Figure 30.

For best accuracy, make the parallel combination of R1 and R2 approximately equal to 19 kΩ. This 19 kΩ, in addition to the internal 8-kΩ resistor, presents the same impedance to the error amp as the 27-kΩ bandgap reference output. This impedance helps compensate for leakages into the error amp terminals.

8.2.2 Detailed Design Procedure

8.2.2.1 Input and Output Capacitor Requirements

Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-μF to
1-μF, low ESR capacitor across the input supply near the regulator. This counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or the device is located several inches from the power source.

8.2.2.2 Dropout Voltage

The TPS731xx uses an NMOS pass transistor to achieve extremely low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the NMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS(on) of the NMOS pass element.

For large step changes in load current, the TPS731xx requires a larger voltage drop from VIN to VOUT to avoid degraded transient response. The boundary of this transient dropout region is approximately twice the DC dropout. Values of VIN – VOUT above this line insure normal transient response.

Operating in the transient dropout region can cause an increase in recovery time. The time required to recover from a load transient is a function of the magnitude of the change in load current rate, the rate of change in load current, and the available headroom (VIN to VOUT voltage drop). Under worst-case conditions [full-scale instantaneous load change with (VIN – VOUT) close to DC dropout levels], the TPS731xx can take a couple of hundred microseconds to return to the specified regulation accuracy.

8.2.2.3 Transient Response

The low open-loop output impedance provided by the NMOS pass element in a voltage follower configuration allows operation without an output capacitor for many applications. As with any regulator, the addition of a capacitor (nominal value 1 μF) from the output pin (OUT) to ground will reduce undershoot magnitude but increase its duration. In the adjustable version, the addition of a capacitor, CFB, from the OUT pin to the FB pin will also improve the transient response.

The TPS731xx does not have active pulldown when the output is overvoltage. This allows applications that connect higher voltage sources, such as alternate power supplies, to the output. This also results in an output overshoot of several percent if the load current quickly drops to zero when a capacitor is connected to the output. The duration of overshoot can be reduced by adding a load resistor. The overshoot decays at a rate determined by output capacitor COUT and the internal and external load resistance. The rate of decay is given by Equation 4 and Equation 5:

(Fixed-voltage version)

Equation 4. TPS731 q4_bvs034.gif

(Adjustable-voltage version)

Equation 5. TPS731 q5_bvs034.gif

8.2.3 Application Curves

TPS731 trn-on_res_bvs034.gif Figure 33. TPS73133 Turnon Response
TPS731 trn-off_res_bvs034.gif Figure 34. TPS73133 Turnoff Response