SBVS067R January 2006 – December 2019 TPS737
A precision bandgap reference is used to generate the internal reference voltage, Vref. This reference is the dominant noise source within the TPS737xx and it generates approximately 32 μVRMS (10 Hz to 100 kHz) at the reference output (NR). The regulator control loop gains up the reference noise with the same gain as the reference voltage, so that the noise voltage of the regulator is approximately given by:
Because the value of VR is 1.2 V, this relationship reduces to:
for the case of no CNR.
An internal 27-kΩ resistor in series with the noise reduction pin (NR) forms a low-pass filter for the voltage reference when an external noise reduction capacitor, CNR, is connected from NR to ground. For CNR = 10 nF, the total noise in the 10-Hz to 100-kHz bandwidth is reduced by a factor of approximately 3.2, giving the approximate relationship:
for CNR = 10 nF.
This noise reduction effect is shown as RMS Noise Voltage vs CNR in the Typical Characteristics section.
The TPS73701 adjustable version does not have the NR pin available. However, connecting a feedback capacitor, CFB, from the output to the feedback pin (FB) reduces output noise and improve load transient performance. This capacitor should be limited to 0.1 µF.
The TPS737xx uses an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the NMOS pass element above VOUT. The charge pump generates approximately 250 μV of switching noise at approximately 4 MHz; however, charge-pump noise contribution is negligible at the output of the regulator for most values of IOUT and COUT.