SBVS074L January   2007  – March 2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics IOUT = 50 mA
    7. 6.7 Typical Characteristics IOUT = 1 A
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable/Shutdown
      2. 7.3.2 Power Good
      3. 7.3.3 Internal Current Limit
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
    5. 7.5 Programming
      1. 7.5.1 Programmable Soft-Start
      2. 7.5.2 Sequencing Requirements
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjusting the Output Voltage
      2. 8.1.2 Input, Output, and Bias Capacitor Requirements
      3. 8.1.3 Transient Response
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Output Noise
    2. 8.2 Typical Applications
      1. 8.2.1 FPGA I/O Supply at 1.5 V With a Bias Rail
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 FPGA I/O Supply at 1.5 V Without a Bias Rail
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Estimating Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

DRC Package
10-Pin VSON With Thermal Pad
Top View
TPS748 po-bvs074.gif
RGW Package
20-Pin VQFN
Top View
TPS748 po_qfn_bvs074.gif

Pin Functions

PIN I/O DESCRIPTION
NAME VSON VQFN
BIAS 4 10 I Bias input voltage for error amplifier, reference, and internal control circuits. A 1-µF or larger input capacitor is recommended for optimal performance. If IN is connected to BIAS, a 4.7-µF or larger capacitor must be used.
EN 5 11 I Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. This pin must not be left unconnected.
FB 8 16 I Feedback pin. The feedback connection to the center tap of an external resistor divider network that sets the output voltage. This pin must not be left floating.
GND 6 12 Ground
IN 1, 2 5-8 I Input to the device. A 1-µF or larger input capacitor is recommended for optimal performance.
NC N/A 2-4, 13, 14, 17 No connection. This pin can be left floating or connected to GND to allow better thermal contact to the top-side plane.
OUT 9, 10 1, 18-20 O Regulated output voltage. A small capacitor (total typical capacitance ≥ 2.2 μF, ceramic) is needed from this pin to ground to assure stability.
PG 3 9 O Power Good pin. An open-drain, active-high output that indicates the status of VOUT. When VOUT exceeds the PG trip threshold, the PG pin goes into a high-impedance state. When VOUT is below this threshold the pin is driven to a low-impedance state. A pull-up resistor from 10 kΩ to 1 MΩ should be connected from this pin to a supply of up to 5.5 V. The supply can be higher than the input voltage. Alternatively, the PG pin can be left unconnected if output monitoring is not necessary.
SS 7 15 Soft-Start pin. A capacitor connected on this pin to ground sets the start-up time. If this pin is left unconnected, the regulator output soft-start ramp time is typically 200 μs.
Thermal pad Must be soldered to the ground plane for increased thermal performance. Internally connected to ground.