SBVS342A February   2019  – March 2019 TPS7A16A-Q1


  1. Features
  2. Applications
  3. Description
    1.     Typical Application Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Regulated Output (VOUT)
      3. 7.3.3 PG Delay Timer (DELAY)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Good
        1. Power-Good Delay and Delay Capacitor
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS7A16A-Q1 Circuit as an Adjustable Regulator
        1. Design Requirements
        2. Detailed Design Procedure
          1. Adjustable Voltage Operation
            1. Resistor Selection
          2. Capacitor Recommendations
          3. Input and Output Capacitor Requirements
          4. Feed-Forward Capacitor (Only for Adjustable Version)
          5. Transient Response
        3. Application Curves
      2. 8.2.2 Automotive Applications
        1. Design Requirements
        2. Detailed Design Procedure
          1. Device Recommendations
        3. Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Additional Layout Considerations
      2. 10.1.2 Power Dissipation
      3. 10.1.3 Thermal Considerations
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

DGN Package
8-Pin HVSSOP With Exposed Thermal Pad
Top View
NC – No internal connection

Pin Functions

DELAY 7 O Delay pin. Connect a capacitor to GND to adjust the PG delay time; leave open if the reset function is not needed.
EN 5 I Enable pin. This pin turns the regulator on or off.
If VEN ≥ VEN_HI, the regulator is enabled.
If VEN ≤ VEN_LO, the regulator is disabled.
If not used, the EN pin can be connected to IN. Make sure that VEN ≤ VIN at all times.
FB/DNC 2 I For the adjustable version, the feedback pin is the input to the control-loop error amplifier. This pin is used to set the output voltage of the device when the regulator output voltage is set by external resistors.
For the fixed-voltage versions, do not connect to this pin. Do not route this pin to any electrical net, not even to GND or IN.
GND 4 Ground pin
IN 8 I Regulator input supply pin. A capacitor > 0.1 µF must be tied from this pin to ground to assure stability. TI recommends connecting a 10-µF ceramic capacitor from IN to GND (as close to the device as possible) to reduce circuit sensitivity to printed-circuit-board (PCB) layout, especially when long input tracer or high source impedances are encountered.
NC 6 --- This pin can be left open or tied to any voltage between GND and IN.
OUT 1 O Regulator output pin. A capacitor > 2.2 µF must be tied from this pin to ground to assure stability. TI recommends connecting a 10-µF ceramic capacitor from OUT to GND (as close to the device as possible) to maximize ac performance.
PG 3 O Power-good pin. Open-collector output; leave open or connect to GND if the power-good function is not needed.
Thermal pad Pad --- Solder to the printed circuit board (PCB) to enhance thermal performance. Although the thermal pad can be left floating, TI highly recommends connecting the thermal pad to the GND plane.